Interrupt Processing - Fujitsu F2MC-8FX Hardware Manual

F2mc-8fx 8-bit microcontroller
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8.1.2

Interrupt Processing

When an interrupt request is generated by a peripheral resource, the interrupt controller
passes the interrupt level to the CPU. When the CPU is ready to accept interrupts, it
temporarily halts the program currently being executed and executes an interrupt
service routine.
Interrupt Processing
The procedure of processing an interrupt takes the following steps: the generation of an interrupt resource in a
peripheral resource, the execution of the main program, the setting of the interrupt request flag bit, the
evaluation of the interrupt request enable bit, the evaluation of interrupt level (ILR0 to ILR5 and CCR:IL1,
IL0), the checking for any equal-level interrupt request, and the evaluation of the interrupt enable flag (CCR:I).
Figure 8.1-2 illustrates the steps to take for interrupt processing.
(1)
Initialize peripheral resources
(2)
(7)
Figure 8.1-2 Interrupt Processing Steps
START
Interrupt
YES
from peripheral
resource?
Peripheral
NO
resource interrupt request
output enabled?
NO
Run main program
Interrupt service routine
Clear interrupt request
Restore PC and PS
Execute interrupt processing
Condition code register (CCR)
CPU
(7)
RAM
(6)
Interrupt request
flag
Interrupt request
enabled
(3)
Each peripheral resource
(3)
YES
Check interrupt priority and
(4)
transfer interrupt level to CPU
Compare interrupt level
with IL bit
Interrupt level higher
than IL value?
NO
RETI
CHAPTER 8 INTERRUPTS
I
IL
Check
Comparator
(5)
Release from stop
mode
Release from sleep
mode
Release from timebase
timer/watch mode
(4)
AND
Interrupt
controller
(5)
YES
YES
I flag = 1?
NO
Save PC and PS onto stack
PC ← interrupt vector
(6)
Update IL in PS
95

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