Fujitsu F2MC-8FX Hardware Manual page 539

Table 28.3-1 Functions of Flash Memory Status Register (FSR)
Bit name
bit7
-: Undefined bits
bit6
RDYIRQ:
bit5 Flash memory
operation flag bit
RDY:
Flash memory
bit4
program/erase status
bit
Reserved:
bit3
Reserved bit
IRQEN:
Flash memory
bit2
program/erase interrupt
enable bit
WRE:
Flash memory
bit1
program/erase enable
bit
Reserved:
bit0
Reserved bit
The value read is always "0". Writing has no effect on the operation.
This bit shows the operating state of flash memory.
The RDYIRQ bit is set to "1" upon completion of the flash memory automatic algorithm when flash
memory programming/erasing is completed.
• An interrupt request occurs when the RDYIRQ bit is set to "1" if interrupts triggered by the
completion of flash memory programming/erasing have been enabled (FSR:IRQEN = 1).
• If the RDYIRQ bit is set to "0" when flash memory programming/erasing is completed, further
flash memory programming/erasing is disabled.
Setting the bit to "0": Clears the bit.
Setting the bit to "1": Has no effect on the operation.
"1" is read from the bit whenever a read-modify-write (RMW) instruction is used.
This bit shows the programming/erasing status of flash memory.
• Flash memory programming/erasing cannot be performed with the RDY bit set to "0".
• A read/reset command can be accepted even when the RDY bit contains "0". The RDY bit is set to
"1" upon completion of programming/erasing.
• It takes a delay of two machine clock (MCLK) cycles after the issuance of a program/erase
command for the RDY bit to be set to "0". Read this bit after, for example, inserting NOP twice
after issuing the program/erase command.
Be sure to set this bit to "0".
This bit enables or disables the generation of interrupt requests in response to the completion of flash
memory programming/erasing.
Setting the bit to "1": Causes an interrupt request to occur when the flash memory operation flag
bit is set to "1" (FSR:RDYIRQ = 1).
Setting the bit to "0": Prevents an interrupt request from occurring even when the flash memory
operation flag bit is set to "1" (FSR:RDYIRQ = 1).
This bit enables or disables the programming/erasing of data into/from the flash memory area.
Set the WRE bit before invoking a flash memory program/erase command.
Setting the bit to "0": Prevents a program/erase signal from being generated even when a
program/erase command is input.
Setting the bit to "1": Allows flash memory programming/erasing to be performed after a
program/erase command is input.
• When flash memory is not to be programmed or erased, set the WRE bit to "0" to prevent it from
being accidentally programmed or erased.
• To program data into the flash memory, set FSR:WRE to "1" to write-enable the flash memory and
set the flash memory sector write control register (SWRE0/SWRE1). When FSR:WRE disables
programming (contains "0"), write access to flash memory does not take place even though it is
enabled by the flash memory write control register (SWRE0/SWRE1).
Be sure to set this bit to "0".
CHAPTER 28 256-KBIT FLASH MEMORY
Function
525