Configuration Of Lcd Controller - Fujitsu F2MC-8FX Hardware Manual

24.2

Configuration of LCD Controller

The LCD controller consists of the following blocks, which are divided functionally into
a controller section that generates the segment and common signals based on the
content of display RAM and a driver section that drives the LCD.
Controller section
• LCDC control register (LCDCC)
• LCDC enable registers (LCDCE1 to 5)
• LCDC blinking setting registers (LCDCB1/2)
• Display RAM
• Clock selection
• Timing control
Driver section
• AC waveform generator circuit
• Common driver
• Segment driver
• Divider resistor
LCD Controller Block Diagram
Main clock
Subclock
LCDC control register (LCDCC)
This register is used to select the clock for generating the frame period, select display or display
blanking, select the display mode, select the frame period clock, and control the LCD driving
Figure 24.2-1 LCD Controller Block Diagram
LCDC control register
(LCDCC)
LCDC enable registers 1 to 5
(LCDCE1 to 5)
LCDC blinking setting registers 1/2
(LCDCB1/2)
Clock Timing
selection control
Display RAM:
28 x 4 bits
(14 bytes)
Controller section
CHAPTER 24 LCD CONTROLLER
Internal divider
resistor
COM0
COM1
Common
COM2
driver
COM3
Segment
driver
Driver section
SEG00
:
SEG23
SEG28
SEG31
433