Fujitsu F2MC-8FX Hardware Manual page 173

Timebase timer counter
22-bit down-counter that uses the main clock divided by two as the count clock
Counter clear circuit
This circuit controls clearing of the timebase counter.
Interval timer selector
This circuit selects the one bit from four bits in the 22 bits that make up the timebase timer counter to use
the interval timer.
Timebase timer control register (TBTC)
This register selects the interval time, clears the counter, controls interrupts and checks the status.
Input Clock
The timebase timer uses the main clock divided by two as its input clock (count clock).
Output Clock
The timebase timer supplies clocks to the main clock oscillation stabilization wait time timer, the main PLL
clock oscillation stabilization wait timer, the watchdog timer, the prescaler and the LCD controller.
CHAPTER 10 TIMEBASE TIMER
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