Block Programming Instructions - Omron SYSMAC CS1D-PD Series Operation Manual

Instruction Execution Times and Number of Steps

9-5-29 Block Programming Instructions

Instruction Mnemonic Code Length
BLOCK BPRG
PROGRAM
BEGIN
BLOCK BEND
PROGRAM
END
BLOCK BPPS
PROGRAM
PAUSE
BLOCK BPRS
PROGRAM
RESTART
CONDI- Execution
TIONAL condition
BLOCK EXIT
EXIT
CONDI- EXIT (bit
TIONAL address)
BLOCK EXIT
CONDI- EXIT NOT
TIONAL (bit
BLOCK EXIT address)
(NOT)
Branching Execution
condition
IF
Branching IF (relay
number)
Branching IF NOT
(NOT) (relay
number)
Branching ELSE
Branching IEND
ONE CYCLE Execution
AND WAIT condition
WAIT
ONE CYCLE WAIT
AND WAIT (relay
number)
ONE CYCLE WAIT NOT
AND WAIT (relay
(NOT) number)
402
(steps)
CPU6@HA
(See
(Duplex CPU)
note 1.)
096 2 9.0
801 1 8.0
811 2 7.0
812 2 3.0
806 1 9.8
4.9
806 2 11.6
6.4
806 2 11.6
6.4
802 1 2.7
4.6
802 2 4.6
6.4
802 2 4.8
6.4
803 1 3.9
4.6
804 1 4.4
8.5
805 1 12.9
5.2
805 2 12.0
7.0
805 2 12.0
7.0
Execution time (µs)
CPU6@H CPU@@SA CPU6@S
(Duplex CPU) (Single (Single
CPU)
12.1 9.0 12.1
9.6 8.0 9.6
10.6 7.0 10.6
5.1 3.0 5.1
10.0 9.8 10.0
4.0 4.9 4.0
6.8 11.6 6.8
4.7 6.4 4.7
12.4 11.6 12.4
7.1 6.4 7.1
4.6 2.6 4.6
6.7 4.6 6.7
6.8 4.2 6.8
9.0 6.2 9.0
7.1 4.4 7.1
9.2 6.3 9.2
6.2 3.9 6.2
6.8 2.4 6.8
6.9 4.4 6.9
4.4 8.5 4.4
12.6 12.9 12.6
3.9 5.2 3.9
12.0 12.0 12.0
6.1 7.0 6.1
12.2 12.0 12.2
6.4 7.0 6.4
Section 9-5
Conditions
CPU4@S
(Single
CPU) CPU)
13.0 ---
12.3 ---
12.3 ---
5.6 ---
11.3 EXIT condition
satisfied
4.9 EXIT condition
not satisfied
13.5 EXIT condition
satisfied
7.2 EXIT condition
not satisfied
14.0 EXIT condition
satisfied
7.6 EXIT condition
not satisfied
4.8 IF true
7.3 IF false
7.2 IF true
9.6 IF false
7.6 IF true
10.1 IF false
6.7 IF true
7.7 IF false
7.7 IF true
4.6 IF false
13.7 WAIT condition
satisfied
4.1 WAIT condition
not satisfied
13.4 WAIT condition
satisfied
6.5 WAIT condition
not satisfied
13.8 WAIT condition
satisfied
6.9 WAIT condition
not satisfied