Page 1 6<60$& &6&- 6HULHV &6*+&38##(9 &-*&38## 3URJUDPPDEOH &RQWUROOHUV 3URJUDPPLQJ 0DQXDO 3URGXFHG $SULO ...
Page 3 OMRON. No patent liability is assumed with respect to the use of the information contained herein. Moreover, because OMRON is con- stantly striving to improve its high-quality products, the information contained in this manual is subject to change without notice.
Page 5: Table Of Contents
TABLE OF CONTENTS PRECAUTIONS ........Intended Audience ............General Precautions .
Page 6 TABLE OF CONTENTS 3-24 Clock Instructions ............3-25 Debugging Instructions .
Page 7 Describes the use of Serial Communications CS1W-SCB21/41, CS1W-SCU21, Unit and Boards to perform serial communica- CJ1W-SCU41 tions with external devices, including the usage Serial Communications Boards and of standard system protocols for OMRON prod- Serial Communications Units ucts. Operation Manual SYSMAC WS02-PSTC1-E W344...
Page 8 About this Manual, Continued This manual contains the following sections. Section 1 describes the basic structure and operation of the CPU Unit. Section 2 describes basic information required to write, check, and input programs. Section 3 outlines the instructions that can be used to write user programs. Section 4 describes the operation of tasks.
Page 9 PRECAUTIONS This section provides general precautions for using the CS/CJ-series Programmable Controllers (PCs) and related devices. The information contained in this section is important for the safe and reliable application of Programmable Controllers. You must read this section and understand the information contained before attempting to set up or operate a PC system.
Page 10: Intended Audience
It is extremely important that a PC and all PC Units be used for the specified purpose and under the specified conditions, especially in applications that can directly or indirectly affect human life. You must consult with your OMRON representative before applying a PC System to the above-mentioned applica- tions.
Page 11 Safety Precautions :$51,1* Do not touch any of the terminals or terminal blocks while the power is being supplied. Doing so may result in electric shock. :$51,1* Do not attempt to disassemble, repair, or modify any Units. Any attempt to do so may result in malfunction, fire, or electric shock.
Page 12: Operating Environment Precautions
Operating Environment Precautions Operating Environment Precautions &DXWLRQ Do not operate the control system in the following locations: • Locations subject to direct sunlight. • Locations subject to temperatures or humidity outside the range specified in the specifications. • Locations subject to condensation as the result of severe changes in tem- perature.
Page 13 Application Precautions with allocations to I/O Units. Instead, use a Programming Device or the CX-Programmer to manually allocate I/O for the DeviceNet devices, being sure that the same words and bits are not allocated more than once, and transfer the resulting I/O table to the CPU Unit. If DeviceNet communications are attempted when the same bits are allocated to both DeviceNet devices and I/O Units (which can occur even if auto- matic allocation is used), the DeviceNet devices and I/O Units may...
Page 14 Application Precautions size of data written does not exceed the size of the DM Area. When the data file is read from the Memory Card at startup, data will be written in the CPU Unit starting at D20000 even if another address was set when the AUTOEXEC.IOM file was created.
Page 15 Application Precautions • Disconnect the functional ground terminal when performing withstand voltage tests. Not disconnecting the functional ground terminal may result in burning. • Install the Units properly as specified in the operation manuals. Improper installation of the Units may result in malfunction. •...
Page 16: Conformance To Ec Directives
Concepts EMC Directives OMRON devices that comply with EC Directives also conform to the related EMC standards so that they can be more easily built into other devices or the overall machine. The actual products have been checked for conformity to EMC standards (see the following note).
Page 17 Conformance to EC Directives 2. You must use reinforced insulation or double insulation for the DC power supplies used for the communications power supply and I/O power sup- plies. 3. CS/CJ-series PCs complying with EC Directives also conform to the Com- mon Emission Standard (EN50081-2).
Page 18 Conformance to EC Directives Circuit Current Characteristic Required element If the load is a relay or solenoid, there is The capacitance of the capacitor must CR method be 1 to 0.5 µF per contact current of a time lag between the moment the cir- cuit is opened and the moment the load 1 A and resistance of the resistor must be 0.5 to 1 Ω...
Page 19: Conformance To Ec Directives
Conformance to EC Directives When switching a load with a high inrush current such as an incandescent lamp, suppress the inrush current as shown below. Countermeasure 1 Countermeasure 2 Providing a dark current of Providing a limiting resistor approx. one-third of the rated value through an incandescent...
Page 21: Cpu Unit Operation
SECTION 1 CPU Unit Operation This section describes the basic structure and operation of the CPU Unit. Checking the Package ......... . . Initial Setup (CS-series CPU Units Only).
Page 22: Checking The Package
Section 1-1 Checking the Package Checking the Package Check to be sure that the CPU Unit and Battery Unit are in good shape with- out any damage. One CS1S-BAT01 Battery Set (See note.) CS-series CPU Unit One CPM2A-BAT01 Batter Set (See note.) One CJ1W-TER01 End Cover Two PFP-M End Plates CJ-series CPU Unit...
Page 23: Initial Setup (Cs-Series Cpu Units Only)
Section 1-2 Initial Setup (CS-series CPU Units Only) Initial Setup (CS-series CPU Units Only) Battery Installation Before using a CS-series CPU Unit, you must install the Battery Set in the CPU Unit using the following procedure. 1,2,3... 1. Insert a flat-blade screwdriver in the small gap at the bottom of the battery compartment and flip the cover upward to open it.
Page 24 Section 1-2 Initial Setup (CS-series CPU Units Only) 2. Hold the Battery Set with the cable facing outward and insert it into the bat- tery compartment. Battery compartment 3. Connect the battery connector to the battery connector terminals. Connect the red wire to the top and the white wire to the bottom terminal. There are two sets of battery connector terminals;...
Page 25 Section 1-2 Initial Setup (CS-series CPU Units Only) 4. Fold in the cable and close the cover. Clearing Memory After installing the battery, clear memory using the memory clear operation to initialize the RAM inside the CPU Unit. Programming Console Use the following procedure from a Programming Console.
Page 26: Using The Internal Clock (Cs-Series Cpu Units Only)
Section 1-3 Using the Internal Clock (CS-series CPU Units Only) Using the Internal Clock (CS-series CPU Units Only) The internal clock of the CPU Unit is set to “00 year, 01 month, 01 day (00-01- 01), 00 hours, 00 minutes, 00 seconds (00:00:00), and Sunday (SUN)” when the Battery Set is mounted in the CS-series CPU Unit.
Page 27: Internal Structure Of The Cpu Unit
Section 1-4 Internal Structure of the CPU Unit Internal Structure of the CPU Unit 1-4-1 Overview The following diagram shows the internal structure of the CPU Unit. The program is divided CPU Unit Task 1 into tasks and the tasks are executed in order by task number.
Page 28: Block Diagram Of Cpu Unit Memory
Section 1-4 Internal Structure of the CPU Unit DIP Switches DIP switches are used to set initial or other settings through hardware switches. Memory Cards Memory Cards are used as needed to store data such as programs, I/O mem- ory data, the PC Setup, and I/O comments created by Programming Devices. Programs and various system settings can be written automatically from the Memory Card when power is turned ON (automatic transfer at startup).
Page 29: Operating Modes
Section 1-5 Operating Modes Programming Device to clear the PC’s RAM (parameter area, I/O memory area, and user program). Operating Modes 1-5-1 Description of Operating Modes The following operating modes are available in the CPU Unit. These modes control the entire user program and are common to all tasks. PROGRAM Mode Program execution stops in PROGRAM mode.
Page 30: Initialization Of I/O Memory
Section 1-5 Operating Modes Cyclic tasks that are executable (READY) at the start of operation or that are made executable by TKON(820) will be executed when program execution reaches their task number. Interrupt tasks will be executed if their interrupt conditions occur.
Page 31: Programs And Tasks
Allocation I/O refreshing With earlier OMRON PCs, one continuous program is formed from several parts. The programs allocated to each task are single programs that terminate with an END instruction, just like the single program in earlier PCs.
Page 32 Section 1-6 Programs and Tasks One feature of the cyclic tasks is that they can be enabled (executable status) and disabled (standby status) by the task control instructions. This means that several program components can be assembled as a task, and that only spe- cific programs (tasks) can then be executed as needed for the current product model or process being performed (program step switching).
Page 33 Section 1-6 Programs and Tasks • A card that is activated will remain activated and will be read in subse- quent sequences. A card that is deactivated will remain deactivated and will be skipped until it is reactivated by another card. Earlier program: CS/CJ-series program: Like a scroll...
Page 34: Description Of Tasks
Section 1-7 Description of Tasks Description of Tasks Tasks are broadly grouped into the following types: 1,2,3... 1. Cyclic tasks (32 max.) Tasks that will be executed once per cycle if executable. 2. Interrupt tasks Tasks that are executed when the interrupt occurs whether or not a cyclic task is being executed.
Page 35 Section 1-7 Description of Tasks Each program is allocated 1:1 to a task through individual program property settings set with the CX-Programmer. Cyclic task 0 Interrupt task 5 Executed in order starting from the lowest number. Cyclic task 1 Interrupt occurs Cyclic task 2 Note Condition Flags (ER, >, =, etc.) and instruction conditions (interlock ON, etc.) are cleared at the...
Page 36 Section 1-7 Description of Tasks Executable and Standby The TASK ON and TASK OFF instructions (TKON(820) and TKOF(821)) can Status be executed in one task to place another task in executable or standby status. Instructions in tasks that are on standby will not be executed, but their I/O sta- tus will be maintained.
Page 37 Section 1-7 Description of Tasks Example: Each Task Controlled by Another Task In this example, each task is controlled by another task. Program Program for task 0 Task 0 Task 1 Task 2 Program for task 1 Example: Task 1 is set to be executed at the start of operation unconditionally.
Page 38 Section 1-7 Description of Tasks Task Execution Time While a task is in standby, instructions in that task will not be executed so their OFF instruction execution time will not be added to the cycle time. Note From this standpoint, instructions in a task that is on standby are just like instructions in a jumped program section (JMP-JME).
Page 39: Programming
SECTION 2 Programming This section basic information required to write, check, and input programs. Basic Concepts ..........2-1-1 Programs and Tasks .
Page 40: Basic Concepts
Section 2-1 Basic Concepts Basic Concepts 2-1-1 Programs and Tasks CS/CJ-series PCs execute ladder-diagram programs contained in tasks. The ladder-diagram program in each task ends with an END(001) instruction just as with conventional PCs. Tasks are used to determine the order for executing the ladder-diagram pro- grams, as well as the conditions for executing interrupts.
Page 41: Basic Information On Instructions
Section 2-1 Basic Concepts 2-1-2 Basic Information on Instructions Programs consist of instructions. The conceptual structure of the inputs to and outputs from an instruction is shown in the following diagram. ower flow (P.F., execution condition) Power flow (P.F., execution condition)* Instruction nstruction condition Instruction condition*...
Page 42: Instruction Location And Execution Conditions
Section 2-1 Basic Concepts Flags In this context, a flag is a bit that serves as an interface between instructions. Input flags Output flags • Differentiation Flags • Differentiation Flags Differentiation result flags. The status of these flags are Differentiation result flags. The status of these flags are input automatically to the instruction for all differentiated output automatically from the instruction for all differenti- up/down output instructions and the DIFU(013)/...
Page 43 Section 2-1 Basic Concepts See 6(&7,21 ,QVWUXFWLRQ )XQFWLRQV Instructions for details on individual instructions. Instruction type Possible location Execution Diagram Examples condition Input instructions Logical start (Load Connected directly Not required. LD, LD TST(350), instructions) to the left bus bar LD >...
Page 44: Addressing I/O Memory Areas
Section 2-1 Basic Concepts 2-1-4 Addressing I/O Memory Areas Bit Addresses @@@@ @@ Bit number (00 to 15) Indicates the word number. Example: The address of bit 03 in word 0001 in the CIO Area would be as shown below. This address is given as “CIO 000103” in this manual. 0001 03 Bit number (03) Word number: 0001...
Page 45: Specifying Operands
Section 2-1 Basic Concepts Example: The address of word 2000 in the current bank of the Extended Data Memory would be as follows: E00200 Word number (address) The address of word 2000 in the bank 1 of the Extended Data Memory would be as follows: E1_00200 Word number (address)
Page 46 Section 2-1 Basic Concepts Operand Description Notation Application examples Specifying The offset from the beginning of the area is indirect DM/ specified. The contents of the address will be EM addresses treated as binary data (00000 to 32767) to specify the word address in Data Memory (DM) in Binary or Extended Data Memory (EM).
Page 47 Section 2-1 Basic Concepts Operand Description Notation Application examples Specifying MOV #0001 The offset from the beginning of the area is *D00200 indirect DM/ *D00200 specified. The contents of the address will be EM addresses treated as BCD data (0000 to 9999)to specify 0 1 0 0 Contents the word address in Data Memory (DM) or Ex-...
Page 48 Section 2-1 Basic Concepts Data Operand Data form Symbol Range Application example 16-bit con- All binary data or Unsigned binary #0000 to #FFFF stant a limited range of Signed decimal ± –32768 to binary data +32767 Unsigned deci- & (See Note.) &0 to &65535 All BCD data or a #0000 to #9999...
Page 49 Section 2-1 Basic Concepts ASCII Characters Bits 0 to 3 Bits 4 to 7 Binary 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0000 Space 0001 0010 & & 0011 0100 0101 0110 0111 1000...
Page 50: Data Formats
Section 2-1 Basic Concepts 2-1-6 Data Formats The following table shows the data formats that the CS/CJ Series can handle. Data type Data format Decimal 4-digit hexadecimal Unsigned 0 to 0000 to FFFF 15 14 13 12 11 10 9 binary 65535 Binary...
Page 51 Section 2-1 Basic Concepts Negative Numbers: A value is negative if the leftmost bit is 1 (ON). In 4-digit hexadecimal, this is expressed as 8000 to FFFF Hex. The absolute of the negative value (decimal) is expressed as a two’s complement. Example: If a negative value is –19 in decimal, the two’s complement of the absolute value of 19 (0013 Hex) is FFFF Hex minus 0013 Hex plus 0001 Hex, which yields FFED Hex.
Page 52 Section 2-1 Basic Concepts Signed BCD Data Signed BCD data is a special data format that is used to express negative numbers in BCD. Although this format is found in applications, it is not strictly defined and depends on the specific application. The CS/CJ Series supports the following instructions to convert the data formats: SIGNED BCD-TO- BINARY: BINS(470), DOUBLE SIGNED BCD-TO-BINARY: BISL(472), SIGNED BINARY-TO-BCD: BCDS(471), and DOUBLE SIGNED BINARY-...
Page 53: Instruction Variations
Section 2-1 Basic Concepts Decimal Unsigned binary (4-digit Signed binary (4-digit hexadecimal) hexadecimal) –1 Cannot be expressed. FFFF –2 FFFE –32,767 8001 –32,768 8000 2-1-7 Instruction Variations The following variations are available for instructions to differentiate executing conditions and to refresh data when the instruction is executed (immediate refresh).
Page 54 Section 2-1 Basic Concepts Input-differentiated Instructions Upwardly Differentiated Instructions (Instruction Preceded by @) • Output Instructions: The instruction is executed only during the cycle in which the execution condition turned ON (OFF → ON) and are not exe- cuted in the following cycles. Example (@) Upwardly-differ @MOV...
Page 55: I/O Instruction Timing
Section 2-1 Basic Concepts 2-1-9 I/O Instruction Timing The following timing chart shows different operating timing for individual instructions using a program comprised of only LD and OUT instructions. Input read Input read Input read Input read Input read Input read Input read...
Page 56 Section 2-1 Basic Concepts • Use in Interlocks (IL - ILC Instructions) In the following example, the previous value flag for the differentiated instruction maintains the previous interlocked value and will not output a differentiated output at point A because the value will not be updated while the interlock is in effect.
Page 57: Refresh Timing
Section 2-1 Basic Concepts 2-1-10 Refresh Timing The following methods are used to refresh external I/O. • Cyclic refresh • Immediate refresh (! specified instruction, IORF instruction) Cyclic Refresh Every program allocated to a ready cyclic task or a task where interrupt condi- tion has been met will execute starting from the beginning program address and will run until the END(001) instruction.
Page 58 Section 2-1 Basic Concepts Immediate refresh Real I/O Input !LD 000101 Wd 0001 16-bit units !OUT 000209 Output Wd 0002 I/O refresh Wd 0003 !MOV 0003 0004 16-bit units Wd 0004 Cyclic refresh (batch processing) I/O refresh All real I/O Units Refreshed for I/O An I/O REFRESH (IORF(097)) instruction that refreshes real I/O data in a specified word range is available as a special instruction.
Page 59: Program Capacity
30K steps Note Memory capacity for CS/CJ-series PCs is measured in steps, whereas mem- ory capacity for previous OMRON PCs, such as the C200HX/HG/HE and CV- series PCs, was measured in words. Refer to the information at the end of10-...
Page 60 Section 2-1 Basic Concepts General Structure of the A ladder diagram consists of left and right bus bars, connecting lines, input Ladder Diagram bits, output bits, and special instructions. A program consists of one or more program runs. A program rung is a unit that can be partitioned when the bus is split horizontally.
Page 61 Section 2-1 Basic Concepts Basic Ladder Program Concepts 1,2,3... 1. The power flow in a program is from left to right. Power flows in rungs “a” and “b” as though diodes were inserted. Rungs must be changed to pro- duce operation that would be the same as ordinary circuits without a di- odes.
Page 62 Section 2-1 Basic Concepts 5. Output bits can also be used as input bits. 0002 0002 Restrictions 1,2,3... 1.A ladder program must be closed so that signals (power flow) will flow from the left bus bar to the right bus bar. A rung error will occur if the pro- gram is not closed (but the program can be executed).
Page 63 Section 2-1 Basic Concepts 3. An input bit must always be inserted before and never after an output in- struction like an output bit. If it is inserted after an output instruction, then a location error will occur during a Programming Device program check (but the program can be executed).
Page 64: Inputting Mnemonics
Section 2-1 Basic Concepts • Debugging programs will run much smoother if an END(001) instruction is inserted at various break points between sequence rungs and the END(001) instruction in the middle is deleted after the program is checked. Task (program) Task (program) 000000 000000...
Page 65 Section 2-1 Basic Concepts 1,2,3... 1. First separate the rung into small blocks (a) to (f). 0000 0000 0000 0000 0000 0000 0005 0010 0010 0000 0005 0000 0000 0000 0000 0010 0010 0000 0000 0000 0005...
Page 66 Section 2-1 Basic Concepts • Program the blocks from top to bottom and then from left to right. 0000 0000 0010 0010 LD 000000 LD 001000 AND 000001 AND 001001 OR LD 0005 0000 0000 OR 000500 LD 000004 AND 000005 0000 0000 0000...
Page 67: Program Examples
Section 2-1 Basic Concepts 2-1-14 Program Examples 1,2,3... 1. Parallel/Series Rungs 0000 0000 0000 0000 0002 Instruction Operands 000000 0002 000001 000200 000002 AND NOT 000003 A block B block 000200 • Program the parallel instruction in the A block and then the B block. •...
Page 68 Section 2-1 Basic Concepts 3. Example of series connection in a series rung Instruction Operands A1 block B1 block 000000 0000 0000 0000 0000 0002 AND NOT 000001 LD NOT 000002 0000 0002 0002 0002 000003 OR LD 000004 000005 000006 A2 block B2 block...
Page 69 Section 2-1 Basic Concepts 4. Complex Rungs 0000 0000 Instruction Operand 0000 0000 0002 000000 0000 0000 0000 0000 000001 000002 000003 0000 0000 OR LD The diagram above is based on the diagram below. AND LD 0000 0000 0000 000004 000005 OR LD...
Page 70 Section 2-1 Basic Concepts Instruction Operand Reset input 000000 0000 0000 H00000 000001 000002 0000 H00000 AND NOT 000003 10 sec Error input 0001 #0100 H00000 0002 0000 0001 T0001 0100 Error display T0001 H00000 000206 If a holding bit is in use, the ON/OFF status would be held in memory even if the power is turned OFF, and the error signal would still be in effect when power is turned back ON.
Page 71 Section 2-1 Basic Concepts 5. Rungs Requiring Caution or Rewriting OR Instructions With an OR/OR NOT instruction, an OR is taken with current execution condition, i.e., the results of ladder logic up to the OR/OR NOT instruction. In the example at the left, an OR LD instruction will be needed if the rungs are programmed as shown without modification.
Page 72: Precautions
Section 2-2 Precautions Rewrite the rungs on the left. They cannot be executed. The arrows show signal (power flow) flow when the rung consists of control relays. Precautions 2-2-1 Condition Flags Using Condition Flags Conditions flags are shared by all instructions, and will change during a cycle depending on results of executing individual instructions.
Page 73 Section 2-2 Precautions If the Condition Flag is connected directly to the left bus bar, instruction B will be executed based on the execution results of a previous rung if instruction A is not executed. Note Condition Flags are used by all instruction within a single program (task) but they are cleared when the task switches.
Page 74 Section 2-2 Precautions Example: The following example will move #0200 to D00200 if D00100 con- tains #0010 and move #0300 to D00300 if D00100 does not contain #0010. Reflects CMP execution results. Reflects MOV execution results. The Equals Flag will turn ON if D00100 in the rung above contains #0010. #0200 will be moved to D00200 for instruction (1), but then the Equals Flag will be turned OFF because the #0200 source data is not 0000 Hex.
Page 75 Section 2-2 Precautions Using Execution Results from Differentiated Instructions With differentiated instructions, execution results for instructions are reflected in Condition Flags only when execution condition is met, and results for a pre- vious rung (rather than execution results for the differentiated instruction) will be reflected in Condition Flags in the next cycle.
Page 76 Section 2-2 Precautions Refer to the descriptions of individual instructions in the CS/CJ-series Pro- grammable Controllers Programming Manual (W340) for the conditions that will cause the ER Flag to turn ON. Caution is required because some instruc- tions will turn OFF the ER Flag regardless of conditions. Note The PC Setup Settings for when an instruction error occurs determines whether operation will stop when the ER Flag turns ON.
Page 77: Special Program Sections
Section 2-2 Precautions the present values for timers are held in memory after the Work Area, and thus for the following instruction, W500 to W511 will be transferred to D00000 to D00011 and the present values for T0000 to T0007 will be transferred to D00012 to D00019.
Page 78 Section 2-2 Precautions Subroutines Place all the subroutines together just before the END(001) instruction in all programs but after programming other than subroutines. (Therefore, a subrou- tine cannot be placed in a step ladder, block program, FOR - NEXT, or JMP0 - JME0 section.) If a program other than a subroutine program is placed after a subroutine program (SBN to RET), that program will not be executed.
Page 79 Section 2-2 Precautions Instructions Not Available in Step Ladder Program Function Mnemonic Instruction Sections Sequence Control FOR(512), NEXT(513), and FOR, NEXT, and BREAK BREAK(514) LOOP END(001) IL(002) and ILC(003) INTERLOCK and INTER- LOCK CLEAR JMP(004) and JME(005) JUMP and JUMP END CJP(510) and CJPN(511) CONDITIONAL JUMP and CONDITIONAL JUMP NOT...
Page 80 Section 2-2 Precautions Instructions Not Available The following instructions cannot be placed in block program sections. in Block Program Classification by Mnemonic Instruction Sections Function Sequence Control FOR(512), NEXT(513), FOR, NEXT, and BREAK and BREAK(514) LOOP END(001) IL(002) and ILC(003) INTERLOCK and INTER- LOCK CLEAR JMP0(515) and JME0(516) MULTIPLE JUMP and...
Page 81: Checking Programs
Section 2-3 Checking Programs Checking Programs CS/CJ-series programs can be checked at the following stages. • Input check during Programming Console input operations • Program check by CX-Programmer • Instruction check during execution • Fatal error check (program errors) during execution 2-3-1 Errors during Programming Device Input Programming Console...
Page 82 Section 2-3 Checking Programs Area Check Instruction support Instructions and operands supported by PLC by PC Instruction variations (NOT, !, @, and %) Object code integrity Operand ranges Operand area ranges Operand data types Access check for read-only words Operand range checks, including the following. •...
Page 83: Program Execution Check
Section 2-3 Checking Programs Area Check Tasks Run start flag Task program allocation Number of programs Note Output duplication is not checked between tasks, only within individual tasks. Multi-word Operands Memory area boundaries are checked for multi-word operands for the pro- gram check as shown in the following table.
Page 84 Section 2-3 Checking Programs individual instructions. See descriptions of individual instructions in the CS/ CJ-series Programmable Controllers Programming Manual (W340) for more details. If Instruction Errors are set to Stop Operation in the PC Setup, then operation will stop (fatal error) and the Instruction Processing Error Flag (A29508) will turn ON if an instruction processing error occurs and the ER Flag turns ON.
Page 85: Checking Fatal Errors
Section 2-3 Checking Programs UM (User Memory) Overflow Errors UM overflow errors indicate that an attempt was made to execute instruction data stored beyond the last address in the user memory (UM) defined as pro- gram storage area. This error will normally not occur as long as the program is created on a CS/CJ-series Programming Device (including Programming Consoles).
Page 86 Section 2-3 Checking Programs Note If the Error Flag or Access Error Flag turns ON, it will be treated as a program error and it can be used to stop the CPU from running. Specify operation for program errors in the PC Setup. Program error Description Related flags...
Page 87: Instruction Functions
SECTION 3 Instruction Functions This section outlines the instructions that can be used to write user programs. Sequence Input Instructions ........Sequence Output Instructions .
Page 88: Sequence Input Instructions
Section 3-1 Sequence Input Instructions Sequence Input Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code LOAD Indicates a logical start and creates an ON/OFF execution condition based Bus bar on the ON/OFF status of the specified operand bit. Not required !@LD Starting !%LD...
Page 89 Section 3-1 Sequence Input Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code OR LOAD Takes a logical OR between logic blocks. Logic block OR LD Required Logic block Logic block A Logic block B OR LD Parallel connection between logic block A and logic block B.
Page 90: Sequence Output Instructions
Section 3-2 Sequence Output Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BIT TEST LD TST(350), AND TST(350), and OR TST(350) are used in the program TST(350) like LD, AND, and OR; the execution condition is ON when the specified bit OR TST Required in the specified word is ON and OFF when the bit is OFF...
Page 91 Section 3-2 Sequence Output Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DIFFERENTIATE Output DIFD(014) turns the designated bit ON for one cycle when the DIFD(014) DOWN Required execution condition goes from ON to OFF (falling edge). DIFD !DIFD Execution condition B: Bit Status of B...
Page 92: Sequence Control Instructions
Section 3-3 Sequence Control Instructions Sequence Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code Output Indicates the end of a program. END(001) Not required END(001) completes the execution of a program for that cycle. No instructions written after END(001) will be executed. Execution proceeds to the program with the next task number.
Page 93 Section 3-3 Sequence Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code INTERLOCK Interlocks all outputs between IL(002) and ILC(003) when the execution condi- Output ILC(003) CLEAR tion for IL(002) is OFF. IL(002) and ILC(003) are normally used in pairs. Not required JUMP Output...
Page 94 Section 3-3 Sequence Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code MULTIPLE JUMP Output When the execution condition for JMP0(515) is OFF, all instructions JMP0(515) JMP0 Required from JMP0(515) to the next JME0(516) in the program are processed as NOP(000).
Page 95: Timer And Counter Instructions
Section 3-4 Timer and Counter Instructions Timer and Counter Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code TIMER Output TIM operates a decrementing timer with units of 0.1-s. The setting Required range for the set value (SV) is 0 to 999.9 s. Timer input Timer PV N: Timer number...
Page 96 Section 3-4 Timer and Counter Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code ACCUMULATIVE Output TTIM(087) operates an incrementing timer with units of 0.1-s. The Timer TTIM(087) TIMER Required input setting range for the set value (SV) is 0 to 999.9 s. TTIM Reset Timer input...
Page 97 Section 3-4 Timer and Counter Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code REVERSIBLE Output Incre- CNTR(012) operates a reversible counter. CNTR(012) COUNTER ment Required input CNTR Decre- Increment input ment input Reset input Decrement input N: Counter number S: Set value Counter PV Counter PV...
Page 98: Comparison Instructions
Section 3-5 Comparison Instructions Comparison Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code Symbol Compari- Symbol comparison instructions (unsigned) compare two values son (Unsigned) Symbol & options LD: Not (constants and/or the contents of specified words) in 16-bit binary LD, AND, OR + =, required data and create an ON execution condition when the comparison...
Page 99 Section 3-5 Comparison Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code Symbol Compari- : Comparison Symbol comparison instructions (double-word, signed) compare two values son (Double- (constants and/or the contents of specified double-word data) in signed 32-bit data 1 LD: Not word, signed) binary (8-digit hexadecimal) and create an ON execution condition when the required...
Page 100: Data Movement Instructions
Section 3-6 Data Movement Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code MULTIPLE Output Compares 16 consecutive words with another 16 consecutive words MCMP(019) COMPARE Required and turns ON the corresponding bit in the result word where the MCMP contents of the words are not equal.
Page 101 Section 3-6 Data Movement Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code MOVE NOT Output Transfers the complement of a word of data to the specified word. MVN(022) Required Source word @MVN S: Source Bit status D: Destination inverted. Destination word DOUBLE MOVE Output...
Page 102 Section 3-6 Data Movement Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BLOCK Output Transfers the specified number of consecutive words. TRANSFER XFER(070) Required XFER @XFER N words S+(N–1) D+(N–1) N: Number of words S: 1st source word D: 1st destination word BLOCK SET Output...
Page 103: Data Shift Instructions
Section 3-7 Data Shift Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DATA COLLECT Output Transfers the source word (calculated by adding an offset value to the COLL(081) COLL Required base address) to the destination word. @COLL Bs: Source base Bs+n address Of: Offset...
Page 104 Section 3-7 Data Shift Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code ASYNCHRO- Output Shifts all non-zero word data within the specified word range either NOUS SHIFT ASFT(017) Required towards St or toward E, replacing 0000Hex word data. REGISTER ASFT @ASFT Shift direction...
Page 105 Section 3-7 Data Shift Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code ROTATE LEFT Output Shifts all Wd bits one bit to the left including the Carry Flag (CY). ROL(027) Required @ROL Wd: Word DOUBLE Output Shifts all Wd and Wd +1 bits one bit to the left including the Carry Flag ROLL(572) ROTATE LEFT Required...
Page 106 Section 3-7 Data Shift Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code ONE DIGIT SHIFT Output Shifts data by one digit (4 bits) to the right. SRD(075) RIGHT Required @SRD Lost St: Starting word E: End word SHIFT N-BIT Output Shifts the specified number of bits to the left.
Page 107: Increment/Decrement Instructions
Section 3-8 Increment/Decrement Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SHIFT N-BITS Output Shifts the specified 16 bits of word data to the right by the specified NASR(581) RIGHT Required number of bits. NASR @NASR Contents of "a" or "0"...
Page 108: Symbol Math Instructions
Section 3-9 Symbol Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DECREMENT Output Decrements the 4-digit BCD content of the specified word by 1. – – B(596) Required – –B @– –B –1 Wd: Word DOUBLE DEC- Output Decrements the 8-digit BCD content of the specified words by 1.
Page 109 Section 3-9 Symbol Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BCD ADD Output Adds 4-digit (single-word) BCD data and/or constants. +B(404) WITHOUT Required CARRY (BCD) (BCD) CY will turn (BCD) ON when there Au: Augend word is a carry. Ad: Addend word R: Result word DOUBLE BCD...
Page 110 Section 3-9 Symbol Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SIGNED BINARY Output Subtracts 4-digit (single-word) hexadecimal data and/or constants with the – C(412) SUBTRACT Required Carry Flag (CY). WITH CARRY (Signed binary) –C @–C (Signed binary) –...
Page 111 Section 3-9 Symbol Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE BCD Output Subtracts 8-digit (double-word) BCD data and/or constants with the Carry – BCL(417) SUBTRACT Required Flag (CY). WITH CARRY (BCD) Mi +1 –BCL @–BCL Su+1 (BCD) –...
Page 112 Section 3-9 Symbol Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BCD MULTIPLY Output Multiplies 4-digit (single-word) BCD data and/or constants. *B(424) Required (BCD) × (BCD) Md: Multiplicand R +1 (BCD) word Mr: Multiplier word R: Result word DOUBLE BCD Output Multiplies 8-digit (double-word) BCD data and/or constants.
Page 113: Conversion Instructions
Section 3-10 Conversion Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE Output Divides 8-digit (double-word) unsigned hexadecimal data and/or /UL(433) UNSIGNED Required constants. BINARY DIVIDE (Unsigned binary) Dd + 1 @/UL ÷ (Unsigned binary) Dr + 1 Dd: 1st dividend word R + 3 R + 2...
Page 114 Section 3-10 Conversion Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BINARY-TO-BCD Output Converts a word of binary data to a word of BCD data. BCD(024) Required @BCD (BIN) (BCD) S: Source word R: Result word DOUBLE Output Converts 8-digit hexadecimal (32-bit binary) data to 8-digit BCD data. BCDL(059) BINARY-TO- Required...
Page 115 Section 3-10 Conversion Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DATA DECODER Output Reads the numerical value in the specified digit (or byte) in the source word, MLPX MLPX(076) Required turns ON the corresponding bit in the result word (or 16-word range), and @MLPX turns OFF all other bits in the result word (or 16-word range).
Page 116 Section 3-10 Conversion Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DATA ENCODER Output FInds the location of the first or last ON bit within the source word (or 16-word DMPX DMPX(077) Required range), and writes that value to the specified digit (or byte) in the result word. @DMPX 16-to-4 bit conversion FInds leftmost bit...
Page 117 Section 3-10 Conversion Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code ASCII TO HEX Output Converts up to 4 bytes of ASCII data in the source word to their hexadecimal HEX(162) Required equivalents and writes these digits in the specified destination word. @HEX C: 0021 First byte to convert...
Page 118 Section 3-10 Conversion Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SIGNED BCD- Output Converts one word of signed BCD data to one word of signed binary data. BINS(470) TO-BINARY Required BINS @BINS Signed BCD format specified in C Signed BCD Signed binary C: Control word...
Page 119: Logic Instructions
Section 3-11 Logic Instructions 3-11 Logic Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code LOGICAL AND Output Takes the logical AND of corresponding bits in single words of word data ANDW(034) ANDW Required and/or constants. @ANDW → R : Input 1 : Input 2 R: Result word DOUBLE LOGI-...
Page 120 Section 3-11 Logic Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE Output Takes the logical exclusive OR of corresponding bits in double words of word XORL(612) EXCLUSIVE OR Required data and/or constants. XORL +1). (I +1) + (I +1).
Page 121: Special Math Instructions
Section 3-12 Special Math Instructions 3-12 Special Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BINARY ROOT Output Computes the square root of the 32-bit binary content of the specified words ROTB(620) ROTB Required and outputs the integer portion of the result to the specified result word. @ROTB S: 1st source word...
Page 122: Floating-Point Math Instructions
Section 3-13 Floating-point Math Instructions 3-13 Floating-point Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code FLOATING TO Output Converts a 32-bit floating-point value to 16-bit signed binary data and places FIX(450) 16-BIT Required the result in the specified result word. @FIX Floating-point data (32 bits)
Page 123 Section 3-13 Floating-point Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code FLOATING- Output Divides one 32-bit floating-point number by another and places the result in POINT DIVIDE /F(457) Required the specified result words. Dividend (floating- Dd+1 point data, 32 bits) ÷...
Page 124 Section 3-13 Floating-point Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code TANGENT Output Calculates the tangent of a 32-bit floating-point number (in radians) and TAN(462) Required places the result in the specified result words. @TAN Source (32-bit floating-point data) S: 1st source word...
Page 125 Section 3-14 Table Data Processing Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code EXPONENT Output Calculates the natural (base e) exponential of a 32-bit floating-point number EXP(467) Required and places the result in the specified result words. @EXP Source (32-bit floating-point data) S: 1st source...
Page 126 Section 3-14 Table Data Processing Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code FIRST IN FIRST Output Reads the first word of data written to the specified stack (the oldest data in the FIFO(633) Required stack). FIFO PC memory PC memory @FIFO address...
Page 127 Section 3-14 Table Data Processing Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code GET RECORD Output Returns the record number of the record at the PC memory address contained NUMBER GETR(636) Required in the specified Index Register. GETR @GETR Table number (N) PC memory address GETR(636) writes...
Page 128: Data Control Instructions
Section 3-15 Data Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code Output Adds the bytes or words in the range and outputs the result to two words. SUM(184) Required @SUM C: 1st control word R1: 1st word in R1+(W–1) range D: 1st destination...
Page 129 Section 3-15 Data Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DEAD BAND Output Controls output data according to whether or not input data is within the dead BAND(681) CONTROL Required band range. BAND Output @BAND Lower limit (C) S: Input word Input C: 1st limit word...
Page 130 Section 3-15 Data Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SCALING 2 Output Converts signed binary data into signed BCD data according to the specified SCL2(486) SCL2 Required linear function. An offset can be input in defining the linear function. @SCL2 Negative Offset Positive Offset...
Page 131 Section 3-15 Data Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SCALING 3 Output Converts signed BCD data into signed binary data according to the SCL3(487) SCL3 Required specified linear function. An offset can be input in defining the linear @SCL3 function.
Page 132: Subroutine Instructions
Section 3-16 Subroutine Instructions 3-16 Subroutine Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SUBROUTINE Output Calls the subroutine with the specified subroutine number and executes that CALL SBS(091) Required program. Execution condition ON @SBS N: Subroutine number Main program Subroutine program (SBN(092) to...
Page 133: Interrupt Control Instructions
Section 3-17 Interrupt Control Instructions 3-17 Interrupt Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SET INTERRUPT Output Sets up interrupt processing for I/O interrupts or scheduled interrupts. Both I/O MASK MSKS(690) Required interrupt tasks and scheduled interrupt tasks are masked (disabled) when the MSKS PC is first turned on.
Page 134: Step Instructions
Section 3-18 Step Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DISABLE Output Disables execution of all interrupt tasks except the power OFF interrupt. DI(693) INTERRUPTS Required Disables execution of all interrupt tasks (except the power OFF interrupt). ENABLE Output Enables execution of all interrupt tasks that were disabled with DI(693).
Page 135: Basic I/O Unit Instructions
Section 3-19 Basic I/O Unit Instructions 3-19 Basic I/O Unit Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code I/O REFRESH Output Refreshes the specified I/O words. IORF(097) IORF Required @IORF I/O bit area or I/O Unit or Special I/O Unit bit area Special I/O Unit St: Starting word I/O refreshing...
Page 136: Serial Communications Instructions
Section 3-20 Serial Communications Instructions 3-20 Serial Communications Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code PROTOCOL Output Calls and executes a communications sequence registered in a Serial PMCR(260) MACRO Required Communications Board (CS Series only) or Unit PMCR @PMCR CPU Unit Serial Communications Unit...
Page 137: Network Instructions
Section 3-21 Network Instructions 3-21 Network Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code NETWORK SEND Output Transmits data to a node in the network. SEND(090) SEND Required Local node Destination node @SEND n: No. of send words S: 1st source word D: 1st destination word...
Page 138: File Memory Instructions
Section 3-22 File Memory Instructions 3-22 File Memory Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code READ DATA FILE Output Reads the specified data or amount of data from the specified data file in file FREAD(700) FREAD Required memory to the specified data area in the CPU Unit. @FREAD File specified Starting read address...
Page 139: Display Instructions
Section 3-23 Display Instructions 3-23 Display Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DISPLAY Reads the specified sixteen words of extended ASCII and displays the mes- Output MSG(046) MESSAGE sage on a Peripheral Device such as a Programming Console. Required @MSG N: Message...
Page 140: Debugging Instructions
Section 3-25 Debugging Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code HOURS TO Output Converts time data in hours/minutes/seconds format to an equivalent time in SECONDS SEC(065) Required seconds only. @SEC Minutes Seconds S: 1st source Hours word D: 1st destination word Seconds SECONDS TO...
Page 141: Failure Diagnosis Instructions
Section 3-26 Failure Diagnosis Instructions 3-26 Failure Diagnosis Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code FAILURE ALARM Output Generates or clears user-defined non-fatal errors. Non-fatal errors do not stop FAL(006) Required PC operation. @FAL FAL Error Flag ON Corresponding Executed FAL Number Execution of Flag ON...
Page 142: Other Instructions
Section 3-27 Other Instructions 3-27 Other Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SET CARRY Sets the Carry Flag (CY). Output STC(040) Required @STC CLEAR CARRY Turns OFF the Carry Flag (CY). Output CLC(041) Required @CLC SELECT EM Changes the current EM bank.
Page 143 Section 3-28 Block Programming Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BLOCK Block program BPRS Pause and restart the specified block program from another block program. PROGRAM Required (812) RESTART BPRS N: Block program number BPRS(812) executed for block program n. Block program n.
Page 144 Section 3-28 Block Programming Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code CONDITIONAL IF (802) Block program If the execution condition is ON, the instructions between IF(802) and BLOCK Required ELSE(803) will be executed and if the execution condition is OFF, the BRANCHING instructions between ELSE(803) and IEND(804) will be executed.
Page 145 Section 3-28 Block Programming Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code ONE CYCLE AND WAIT(805) Block program If the execution condition is ON for WAIT(805), the rest of the instruction in WAIT Required the block program will be skipped. WAIT Execution Execution...
Page 146 Section 3-28 Block Programming Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code COUNTER WAIT Block program Delays execution of the rest of the block program until the specified count CNTW(814) CNTW Required has been achieved. Execution will be continued from the next instruction after CNTW(814) when the counter counts out.
Page 147 Section 3-28 Block Programming Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code LOOP Block program LOOP(809) designates the beginning of the loop program. LOOP Required Execution Execution Execution Execution condition condition condition condition Execution condition Loop repeated LEND LEND(810) LEND(810) or LEND(810) NOT specifies the end of the loop.
Page 148: Text String Processing Instructions
Section 3-29 Text String Processing Instructions 3-29 Text String Processing Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code MOV STRING Output Transfers a text string. MOV$(664) MOV$ Required @MOV$ S: 1st source word D: 1st destination word CONCATENATE Output Links one text string to another text string.
Page 149 Section 3-29 Text String Processing Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code FIND IN STRING Output Finds a designated text string from within a text string. FIND$(660) FIND Required Found data @FIND$ → → → S1: Source text string first word S2: Found text string first word...
Page 150 Section 3-29 Text String Processing Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code EXCHANGE Output Replaces a designated text string with another designated text string. XCHG$(665) STRING Required XCHG$ @XCHG$ Ex1: 1st exchange word 1 Ex2: 1st exchange word 2 CLEAR STRING Output Clears an entire text string with NUL (00 hex).
Page 151: Task Control Instructions
Section 3-30 Task Control Instructions 3-30 Task Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code TASK ON Output Makes the specified task executable. TKON(820) TKON Required @TKON The specified task's task number The specified task's task number is higher than the local task's task is lower than the local task's task N: Task number number (m<n).
Page 153: Tasks
SECTION 4 Tasks This section describes the operation of tasks. Task Features..........4-1-2 Tasks and Programs .
Page 154: Task Features
Section 4-1 Task Features Task Features 4-1-1 Overview CS/CJ-series control operations can be divided by functions, controlled devices, processes, developers, or any other criteria and each operation can be programmed in a separate unit called a “task.” Using tasks provides the fol- lowing advantages: 1,2,3...
Page 155: Tasks And Programs
Section 4-1 Task Features 6. Easily understood user programs. Programs are structured in blocks that make the programs much simpler to understand for sections that would conventionally be handled with in- structions like jump. Task C Task A (Program A) Start task A Start task B Task B...
Page 156: Basic Cpu Unit Operation
Section 4-1 Task Features 4-1-3 Basic CPU Unit Operation The CPU Unit will execute cyclic tasks starting at the lowest number. It will also interrupt cyclic task execution to execute an interrupt task if an interrupt occurs. Cyclic task 0 Interrupt task 5 xecuted in order starting t the lowest number.
Page 157: Types Of Tasks
Section 4-1 Task Features 4-1-4 Types of Tasks Tasks are broadly classified as either cyclic tasks or interrupt tasks. Interrupt tasks are further divided into power OFF, scheduled, I/O (CS Series only), and external interrupt tasks (CS Series only). Cyclic Tasks A cyclic task that is READY will be executed once each cycle (from the top of the program until the END(001) instruction) in numerical order starting at the task with the lowest number.
Page 158: Task Execution Conditions And Settings
Section 4-1 Task Features 4-1-5 Task Execution Conditions and Settings The following table describes task execution conditions, related settings, and status. Task Execution condition Related Setting Cyclic tasks 0 to 31 Executed once each cycle if None READY when the right to exe- cute is obtained.
Page 159: Status Transitions
Section 4-1 Task Features READY Status A task attribute can be set to control when the task will go to READY status. The attribute can be set to either activate the task using the TASK ON instruc- tion or when RUN operation is started. Instruction-activated A TASK ON (TKON(820)) instruction is used to switch an instruction-activated cyclic task from Disabled status or Standby status to READY status.
Page 160: Using Tasks
Section 4-2 Using Tasks the time can be made into tasks and assigned Standby status to reduce cycle time. Reduced cycle time Conventional program Task Executes under All instructions will set conditions be executed un- less jumps or other functions are used. Executes under set conditions Note Standby status simply means that a task will be skipped during task execu-...
Page 161 Section 4-2 Using Tasks Note At least one cyclic task must be in READY status in each cycle. If there is not cyclic task in READY status, the Task Error Flag (A29512) will turn ON, and the CPU Unit will stop running. Example: Cyclic Task Cyclic task 0 (READY status...
Page 162 Section 4-2 Using Tasks A cyclic task that is in Standby status will maintain that status in subsequent cycles. The task will have to be activated using the TKON(820) instruction in order to switch from Standby to READY status. Cyclic task 1 Standby status Cyclic task 1 Standby status...
Page 163 Section 4-2 Using Tasks Relationship of Tasks to I/O Memory • The Index Registers (IR) and Data Registers (DR) in I/O memory are sep- arate (independent) for each task. IR0 used by cyclic task 1 for example is different from IR0 used by cyclic task 2. •...
Page 164: Task Instruction Limitations
Section 4-2 Using Tasks 4-2-2 Task Instruction Limitations Instructions Required in the Same Task The following instructions must be placed within the same task. Any attempt to split instructions between two tasks will cause the ER Flag to turn ON and the instructions will not be executed.
Page 165 Section 4-2 Using Tasks Cycle Cycle Cycle Task 3 Disabled READY READY Standby ask Flag for task 3 Note Task Flags are used only with cyclic tasks and not with interrupt tasks. With an interrupt task, A44115 will turn ON if an interrupt task executes after the start of operation, and the number of the interrupt task that required for maxi- mum processing time will be stored in two-digit hexadecimal in A44100 to A44107.
Page 166 Section 4-2 Using Tasks Task Number when The type of task and the current task number when a task stops execution Program Stopped (A294) due to a program error will be stored as follows: Type A294 Cyclic task 0000 to 001F Hex (correspond to task numbers 0 to 31) Interrupt task 8000 to 80FF Hex (correspond to interrupt task numbers 0 to 255) This information makes it easier to determine where the fatal error occurred, and it will be cleared when the fatal error is cleared.
Page 167: Designing Tasks
Section 4-2 Using Tasks From Program Mode to Operating or Monitor Mode. Cyclic task 0 with the startup at the start of operation attribute (overall control task) Cyclic task 1 Cyclic task 2 Cyclic task 3 Tasks Separated by Function Tasks Separated by Controlled Section A-section control Conveyor task...
Page 168 Section 4-2 Using Tasks b) Summarize the presence or absence of external I/O. c) Summarize functions. Keep data exchanged between tasks for sequence control, analog control, man-machine interfacing, error processing and other pro- cesses to an absolute minimum in order to maintain a high degree of autonomy.
Page 169: Interrupt Tasks
Section 4-3 Interrupt Tasks Using a block program makes it easier to write logic flow, such as conditional branching and process stepping, which can be hard to write using ladder dia- grams. Block programs are located at the bottom of the program hierarchy, and the larger program units represented by the task can be split into small program units as block programs that operate with the same execution condi- tion (ON condition).
Page 170 Section 4-3 Interrupt Tasks Note The execution time for the power OFF task must be less than 10 ms – (Power OFF delay detection time). CPU Unit Interrupt Pro- gram Power OFF External Interrupts (CS An external interrupt task will be executed when an interrupt is requested by an Special I/O Unit, CPU Bus Unit, or Inner Board (CS Series only).
Page 171 Section 4-3 Interrupt Tasks Example: The following example shows execution I/O interrupt task 103 when interrupt input No. 3 of Interrupt Input Unit No. 0 (the leftmost of the two Units 0 and 1) is ON. Note Do not enable unneeded I/O interrupt tasks. If the interrupt input is triggered by noise and there isn’t a corresponding interrupt task, a fatal error (task error) will cause the program to stop.
Page 172 Section 4-3 Interrupt Tasks Interrupt Input Unit Unit No. CPU Unit Operand S (the Second Operand) of MSKS: The bits of FFF7 Hex corre- spond to the interrupt inputs of the Interrupt Input Unit. Interrupt input num- bers 0 to 15 correspond to bits 0 to 15. F Hex F Hex F Hex...
Page 173 Section 4-3 Interrupt Tasks Interrupt Numbers and Scheduled Interrupt Task Number Interrupt No. Scheduled interrupt task PC Setup Settings Address Name Description Settings Default setting Bits 0 to 3 of 195 Scheduled inter- Sets time unit for scheduled inter- 00 Hex: 10 ms 00 Hex rupt time units rupts to execute interrupt tasks at...
Page 174 Section 4-3 Interrupt Tasks interrupt task will not be executed if power is interrupted during online editing. In addition to the instructions that cannot be used in any interrupt task (refer to the Programming Manual for details), the following instructions cannot be used in the power OFF interrupt task: READ DATA FILE: FREAD(700), WRITE DATA FILE: FWRIT(701), NETWORK SEND: SEND(090), NETWORK RECEIVE: RECV(098), DELIVER COMMAND: CMND(490), TRANSMIT:...
Page 175: Interrupt Task Priority
Section 4-3 Interrupt Tasks CPU Unit after it receives data from its serial port and writes that data into the CPU Unit’s I/O memory. Specifies exter- CPU Unit Serial Communications Board nal interrupt task number and re- Cyclic task Data quests interrupt processing.
Page 176: Interrupt Task Flags And Words
Section 4-3 Interrupt Tasks Interrupt during Interrupt Task Execution If an interrupt occurs while another interrupt task is being executed, the task for the interrupt will not be executed until the original interrupt finishes execut- ing. Cyclic task Interrupt task A Interrupt during Interrupt task B execution...
Page 177: Application Precautions
Section 4-3 Interrupt Tasks Interrupt Task with Maximum Processing Time (A441) The interrupt task number with maximum processing time is stored in binary data. Here, 8000 to 80FF Hex correspond to task numbers 00 to FF Hex. A44115 will turn ON when the first interrupt occurs after the start of operation. The maximum processing time for subsequent interrupt tasks will be stored in the rightmost two digits in hexadecimal and will be cleared at the start of oper- ation.
Page 178 Section 4-3 Interrupt Tasks offending interrupt task number will be stored in A426 (Interrupt Task Error, Task Number). The CPU Unit however will continue to operate. C200H Special I/O Unit Interrupt task Interrupt task Up to 10 ms 10 ms or Master SYSMAC longer BUS Remote I/O Unit...
Page 179 Section 4-3 Interrupt Tasks Related Auxiliary Area Flags/Words Name Address Description Interrupt Task Error A40213 Turns ON if an interrupt task executes for more than 10 ms during Flag C200H Special I/O Unit or SYSMAC BUS Remote I/O refresh, but the CPU Unit will continue running.
Page 180: Programming Device Operations For Tasks
Section 4-4 Programming Device Operations for Tasks Programming Device Operations for Tasks 4-4-1 Using Multiple Cyclic Tasks Use the CX-Programmer to create more than one cyclic task. A Programming Console cannot be used to create new cyclic tasks. Be sure to use a CX-Pro- grammer to allocate the task type and task number for programs that are cre- ated.
Page 181 Section 4-4 Programming Device Operations for Tasks 2. Select the General tab, and select the Task Type and Task No. For the cyclic task, click the check box for Operation start to turn it ON.
Page 183: File Memory Functions
SECTION 5 File Memory Functions This section describes the functions used to manipulate file memory. File Memory ..........5-1-1 Types of File Memory.
Page 184: File Memory
Section 5-1 File Memory File Memory The following media can be used as memory for storing files. 1,2,3... 1. Memory Cards 2. A specified range in the EM Area Both types of memory can be used to store the entire user program, I/O mem- ory, and parameter areas as files.
Page 185: File Data
Section 5-1 File Memory Memory Card is installed or EM File Memory if a Memory Card is not in- stalled. Memory Card Precautions: 1,2,3... 1. Never turn the power OFF or remove the Memory Card when the Memory Card is being accessed by the CPU. (Press the Memory Card power sup- ply switch and wait for the BUSY indicator to go OFF before removing the Memory Card.) It is possible for the Memory Card to become unusable if the PC is turned off or the Memory Card is removed while the Card is being...
Page 186: Files
Section 5-1 File Memory 5-1-3 Files Files are formatted in DOS, and therefore can be used as regular files on a Windows computer. Files are identified by file names and extensions. A file name is written using the following characters: Letters A to Z, numbers 0 to 9, !, &, $, #, `, {, }, –, ^, (, ), and _ The following characters cannot be used in file names: ,, ., /, ¥, ?, *, “, :, :, <, >, =, +, space...
Page 187 Section 5-1 File Memory 3. One example of the CPU Bus Unit settings would be the Data Link Tables. Refer to the operation manuals for specific Units for other setup data. Files Automatically Transferred at Startup Type Extension Description Explanation Name ‡...
Page 188 Section 5-1 File Memory Backup Files (Not The files in the following table are created automatically when data is trans- supported by CS-series ferred to and from the Memory Card during backup operation. CS1 CPU Units that are pre-EV1) Type Extension Description Explanation...
Page 189 Section 5-1 File Memory The symbol table and comment files can be transferred between the CPU Unit and Memory Card or EM file memory with the CX-Programmer’s project trans- fer operation. When CX-Programmer version 1.2 or higher is being used, the symbol table and comment files can also be transferred between the personal computer’s RAM and a memory storage device.
Page 190 Section 5-1 File Memory Data Files General-purpose Files 1,2,3... 1. General-purpose data files have filename extensions IOM, TXT, or CSV. (The TXT and CSV files: Not supported by CS-series CS1 CPU Units that are pre-EV1.) Extension Data format Contents Words/field .IOM Binary Dedicated CS/CJ-series data format with header.
Page 191 Section 5-1 File Memory e) Delimiters: When there are no delimiters, the fields are packed consecutively and then stored. When delimited by commas, commas are insert- ed between fields before they are stored. When delimited by tabs, tab codes are inserted between fields before they are stored. When delimiters (commas or tabs) are specified in FREAD(700), the data is read as delimited data with one-word delimiters (com- mas or tabs).
Page 192 Section 5-1 File Memory 48 bytes (used by system) I/O memory 8 bytes Contents of ABC.IOM CSV/TXT Data File The following illustration shows the data structure of a CSV data file Structure (Single Word) (ABC.CSV) with single-word fields containing four words from I/O memory: 1234 Hex, 5678 Hex, 9ABC Hex, and DEF0 Hex.
Page 193 Section 5-1 File Memory ‡ ,QSXW FKDUDFWHUV LQ HDFK FHOO LI VLQJOHZRUG ILHOGV DUH EHLQJ XVHG RU FKDUDFWHUV LI GRXEOHZRUG ILHOGV DUH EHLQJ XVHG )RU H[DPSOH LI VLQJOH ZRUG ILHOGV DUH EHLQJ XVHG LQSXW $ QRW MXVW $ ‡...
Page 194: Description Of File Operating Procedures
Section 5-1 File Memory ‡ $7(;(&( # ,20 *HQHUDOSXUSRVH (0 ZRUGV 7KH FRQWHQWV RI WKLV ILOH DUH WUDQVIHUUHG WR WKH (0 $UHD EHJLQQLQJ DW ( # B ZKHQ SRZHU LV WXUQHG 21 When creating the data files listed above, always specify the first address shown above (D20000, D00000, or E#_00000) and make sure that the size of the file does not exceed the capacity of the specified data area.
Page 195: Applications
Section 5-1 File Memory Read: Transfers files from file memory to the CPU Unit. Write: Transfers files from the CPU Unit to file memory. Operating Medium File name Description Entire Data Area Parameter procedure program data (See Area data note 3.) Programming Device Memory Card Any valid file...
Page 196 Section 5-1 File Memory Data in an allocated DM area. Example: ABC.IOM In this application, operation data (trends, quality control, and other data) gen- erated during program execution is stored in EM file memory using the WRITE DATA FILE instruction (FWRIT(701)). Trends, etc.
Page 197: Manipulating Files
Section 5-2 Manipulating Files During operation .OBJ Replace program. Parameter Area Files In this application, the PC Setup, routing tables, I/O table, and other data for (.STD) particular devices or machines are stored in Memory Cards. The data can be transferred to another device or machine just by switching the Memory Card.
Page 198: Programming Devices (Including Programming Consoles)
Section 5-2 Manipulating Files 5-2-1 Programming Devices (Including Programming Consoles) The following operations are available through Programming Devices. Operation CX-Programmer Programming Console Reading files (transfer from file memory to CPU Unit) Writing files (transfer from CPU Unit to file memory) Comparing files (compare files in the Not possible CPU Unit and file memory)
Page 199 Section 5-2 Manipulating Files A Memory Card can be installed in a computer’s PC Card slot with the HMC- AP001 Memory Card Adapter (sold separately). Installing a Memory Card in the computer allows data files (.IOM, .TXT, or .CSV), program files (.OBJ), and parameter files (.STD) to be treated as standard MS-DOS files in a Win- dows environment.
Page 200: Fins Commands
Section 5-2 Manipulating Files Symbol File type Data file (.IOM) CIO Area HR Area WR Area Auxiliary Area DM Area EM0_ EM Area Parameter file (.STD) CX-Programmer Use the following procedure for file memory operations. 1,2,3... 1. Double-click the Memory Card icon in the Project Window with the CPU Unit online.
Page 201 Section 5-2 Manipulating Files CPU Unit memory nother PC on Memory Card User CMND he network instruction program EM file memory Parame ter area FINS command Note A computer on an Ethernet Network can read and write file memory (Memory Cards or EM file memory) on a CPU Unit through an Ethernet Unit.
Page 202: Fread(700), Fwrit(701), And Cmnd
Section 5-2 Manipulating Files Note The time from the CPU Unit’s internal clock is used to date files created in file memory with the 220A, 220B, 220C, and 2203 commands. 5-2-3 FREAD(700), FWRIT(701), and CMND(490) The FREAD(700) (READ DATA FILE) and FWRIT(701) (WRITE DATA FILE) instructions will read and write I/O memory data from a specified location from a data file in a Memory Card or EM file memory from the user program.
Page 203 Section 5-2 Manipulating Files Transferring ASCII Files ASCII files can be transferred as well as binary files, so the third and fourth (Not supported by CS- digits of the instruction’s control word operand (C) indicate the type of data file series CS1 CPU Units that being transferred and the number of fields between carriage returns.
Page 204 Section 5-2 Manipulating Files 2. Execution of CMND(490) to send a FINS command to the CPU Unit itself 3. Replacement of the entire program by Auxiliary Area control bit operations 4. Execution of a simple backup operation Use the File Memory Operation Flag (A34313) for exclusive control of file memory instructions to prevent them from being executed while another file memory operation is in progress.
Page 205 Section 5-2 Manipulating Files 1,2,3... 1. Set the destination network address to 00 (local network) in C+2. 2. Set the destination unit address to 00 (PC’s CPU Unit) and the destination node to 00 (within local node) in C+3. 3. Set the number of retries to 0 in C+4. (The number of retries setting is in- valid, so set it to 0.) FINS Commands Related There are other FINS commands related to file memory that are not shown in...
Page 206 Section 5-2 Manipulating Files Refer to the Communications Command Reference Manual (W342) for details on FINS commands. Command Name Description 2201 Hex FILE NAME READ Reads file memory information. 2202 Hex SINGLE FILE READ Reads a specified length of file data from a specified position within a single file.
Page 207: Replacement Of The Entire Program During Operation
D00100 and D00101. (for port 7) In this case, the FINS command creates a subdi- rectory named "CS1" within the OMRON" directory in the CPU Unit's Memory Card. The response is composed of the 2-byte command code (2215) and the 2-byte response code.
Page 208 Section 5-2 Manipulating Files recorded in advance and the specified program file must exist on the Memory Card in order to replace the program during operation. CPU Unit Replacement User program Memory Card Replacement Start Bit (A65015) turned from OFF to ON. Specifies program Replacement Program...
Page 209 Section 5-2 Manipulating Files Note 1. Turn ON the IOM Hold Bit (A50012) if you want to maintain the status of I/ O memory data through the program replacement. Turn ON the Forced Status Hold Bit (A50013) if you want to maintain the status of force-set and force-reset bits through the program replacement.
Page 210 Section 5-2 Manipulating Files If data tracing is being performed, it will be stopped. Instruction conditions (interlocks, breaks, and block program execution) will be initialized. Differentiation Flags will be initialized whether the IOM Hold Bit is ON or OFF. Operations after The status of the cyclic tasks depends upon their operation-start properties.
Page 211 Section 5-2 Manipulating Files Name Address Operation Replacement Start Bit A65015 If this bit has been enabled by the setting the Program Password (A651) to (Not supported by CS-series A5A5 Hex, program replacement will start when this bit is turned from pre-EV1 CS1 CPU Units) OFF to ON.
Page 212 Section 5-2 Manipulating Files Start and execute another task to perform any processing required before pro- gram replacement or IOM Hold Bit processing. Main Task (Cyclic task number 0) First Cycle Flag ← Program version ← Version storage area Execution condition Replacement Start Bit...
Page 213: Automatic Transfer At Startup
Section 5-2 Manipulating Files Task protecting data during program replacement (Cyclic task number 31, standby status at startup) Processing to pro- tect data before pro- gram replacement Always ON Flag begins IOM Hold Bit Outputs to required loads during pro- gram replacement.
Page 214 Section 5-2 Manipulating Files File File name At startup Required for automatic transfer Program File AUTOEXEC.OBJ The contents of this file are automatically transferred and Required on Memory overwrite the entire user program including CPU Unit task Card. attributes. Data File AUTOEXEC.IOM DM words allocated to Special I/O Units, CPU Bus Units, Not required on...
Page 215 Section 5-2 Manipulating Files CPU Unit Front panel DIP switch pin 2 ON User program Memory Card I/O memory • User program file (AUTOEXEC.OBJ) - Re- quired • Parameter area file (AUTOEXEC.STD) - Required • I/O memory file (AUTOEXEC.IOM, ATEX Parameter ECDM.IOM, ATEXECE@.IOM) - Not re- Write at startup...
Page 216: Simple Backup Function
Section 5-2 Manipulating Files Related Auxiliary Bits/Words Name Address Setting Memory Error Flag A40115 ON when an error occurred in memory or there was an error in automatic (Fatal error) transfer from the Memory Card when the power was turned on (automatic transfer at start-up).
Page 217 Section 5-2 Manipulating Files of I/O memory data will be maintained when data is read from the Memory Card. If the Forced Status Hold Bit (A50013) is ON and the PC Setup is set to maintain the Forced Status Hold Bit Status at Startup when the backup files are written, the status of force-set and force-reset bits will be main- tained when data is read from the Memory Card.
Page 218 Section 5-2 Manipulating Files File name and Data area and range of Backup from I/ Restore from Comparing Files required extension addresses stored O memory to Memory Card Memory Card when Memory Card to I/O memory to I/O memory restoring data BACKUPIO.IOR 0000 to 6143 Required...
Page 219 Section 5-2 Manipulating Files Verifying Backup The status of the Memory Card Power (MCPWR) indicator shows whether a Operations with LEDs simple backup operation has been completed normally or not. MCPWR Indicator (This example shows a CS-series CPU Unit.) Backup operation Normal completion Error occurred (See note.)
Page 220: Using File Memory
Section 5-3 Using File Memory Note When the backup operation is completed normally, power to the Memory Card will go OFF when the MCPWR indicator goes OFF. If the Memory Card will be used again, press the Memory Card Power Switch to supply power and exe- cute the desired operation.
Page 221 Section 5-3 Using File Memory Initialize EM file memory. CX-Programmer Programming Console Initializing Individual EM A specified EM bank can be converted from ordinary EM to file memory. File Memory Note The maximum bank number for CJ-series CPU Units is 2. Bank 0 Bank 0 1.
Page 222: Operating Procedures For Memory Cards
Section 5-3 Using File Memory Related Special Auxiliary Relay Name Address Description EM File Memory Starting Bank A344 The bank number that actually starts the EM file memory area at that time will be stored. The EM file from the starting bank number to the last bank will be converted to file memory.
Page 223 Section 5-3 Using File Memory EC.OBJ), parameter area file (AUTOEXEC.STD), and I/O memory file (AUTOEXEC.IOM or ATEXEC##.IOM.) Initialize CX-Programmer Programming Console Note A user program and parameter area file must be on the Memory Card. 3. Turn OFF the PC power supply. 4.
Page 224 Section 5-3 Using File Memory 3. Turn the Replacement Start Bit (A65015) from OFF to ON. Simple Backup Function There are 3 backup operations: backing up data to the Memory Card, restor- ing data from the Memory Card, and comparing data with the Memory Card. Backing Up Data from the CPU Unit to the Memory Card 1,2,3...
Page 225: Operating Procedures For Em File Memory
Section 5-3 Using File Memory 2. Place the CX-Programmer online. 3. Select Transfer and then To PC or From PLC from the PC Menu. 4. Select either Symbols or Comments as the data to transfer. Note If a Memory Card is installed in the CPU Unit, data can be transferred only with the Memory Card.
Page 226: Advanced Functions
SECTION 6 Advanced Functions This section provides details on the following advanced functions: cycle time/high-speed processing functions, index register functions, serial communications functions, startup and maintenance functions, diagnostic and debugging functions, Programming Device functions, and the Basic I/O Unit input response time settings. Cycle Time/High-speed Processing .
Page 227: Cycle Time/High-Speed Processing
Section 6-1 Cycle Time/High-speed Processing Cycle Time/High-speed Processing The following functions are described in this section • Minimum cycle time function • Maximum cycle time function (watch cycle time) • Cycle time monitoring • Quick-response inputs • Interrupt functions • I/O refreshing methods •...
Page 228: Cycle Time Monitoring
Section 6-1 Cycle Time/High-speed Processing Auxiliary Area Flags and Words Name Address Description Cycle Time Too Long A40108 A40108 will be turned ON and the CPU Unit Flag will stop operation if the cycle time exceeds the watch cycle time setting. 6-1-3 Cycle Time Monitoring The maximum cycle time and present cycle time are stored in the Auxiliary...
Page 229: Interrupt Functions
Section 6-1 Cycle Time/High-speed Processing 6-1-5 Interrupt Functions Interrupt tasks can be executed for the following conditions. Refer to ,QWHU UXSW 7DVNV for more details. I/O Interrupts (Interrupt tasks 100 to 131) (CS Series only) An I/O interrupt task is executed when the corresponding input (on the rising edge of the signal or, for CS-series Interrupt Input Units, on either the rising or falling edge) is received from an Interrupt Input Unit.
Page 230: Disabling Special I/O Unit Cyclic Refreshing
Section 6-1 Cycle Time/High-speed Processing Actual I/O data Immediate refreshing CIO 0001 CIO 0002 CIO 0003 CIO 0004 Note 1. When the instruction contains a bit operand, the entire word containing that bit will be refreshed. When the instruction contains a word operand, that word will be refreshed.
Page 231: Index Registers
Section 6-2 Index Registers 1,2,3... 1. Cyclic refreshing for Special I/O Units can be disabled when the cycle time is too long because so many Special I/O Units are installed. 2. If the I/O refreshing time is too short, the Unit’s internal processing may not be able to keep pace, the Special I/O Unit Error Flag (A40206) will be turned ON, and the Special I/O Unit will not operate properly.
Page 232 Section 6-2 Index Registers Increment IR0 and repeat instruction execution Table data Indirect addressing Basic Operation Basically, Index Registers are used with the following steps: 1,2,3... 1. Use MOVR(560) to store the PC memory address of the desired bit or word in an Index Register.
Page 233 Section 6-2 Index Registers Stores the PC memory Instruction A m MOVR(560) m IR0 address of m in IR0. Instruction A m+1 Instruction A ,IR0 Repeats the process in a loop such as FOR-NEXT. Add 1 to IR0 (n times) Instruction A m+n Example 2 The following example uses Index Registers in a FOR–NEXT loop to define...
Page 234 Section 6-2 Index Registers The 11-instruction subroutine on the left is equivalent to the 200-instruction subroutine on the right. W000 Puts the PC memory MOVRW 0000 address of T0000's T0000 D00100 PV in IR0. T0000 W000 MOVR Puts the PC memory address of T0000's T0000 Completion Flag in IR1.
Page 235 Section 6-2 Index Registers Direct Addressing of Index Registers Index Registers can be directly addressed only in the instructions shown in the following table. Instruction group Instruction name Mnemonic Primary function Data Movement Instruc- MOVE TO REGISTER MOVR(560) Stores the PC memory address of tions a bit or word in an Index Register.
Page 236 Section 6-2 Index Registers Stack Processing Stack instructions act on specially defined data tables called stacks. Data can be drawn from a stack on a first-in first-out (FIFO) or last-in first-out (LIFO) basis. A particular region of I/O memory must be defined as a stack. The first words of the stack indicate the length of the stack and contain the stack pointer.
Page 237 Section 6-2 Index Registers The PC memory address of the result word (word containing the max. value, min. value, search data, etc.) is automatically stored in IR0. The Index Regis- ter (IR0) can be used as an operand in later instructions such as MOV(021) to read the contents of the word or perform other processing.
Page 238 Section 6-2 Index Registers A typical application of record tables is storing manufacturing data for different models of a product (such as temperature and pressure settings) in record form and switching from model to model just by changing the record number. Model A ↓...
Page 239 Section 6-2 Index Registers 0000 &1 Defines record table 1 with 1,000 records of 5 words each. &5 &1000 E0_00000 SETR Stores the PC memory address of table num &1 ber 1's first record (record 0) in IR0. &0 Jumps past the FOR-NEXT loop if the pro- cessing conditions haven't been set.
Page 240: Serial Communications
Ports Peripheral RS-232C Host link 1) Various control commands such as reading Host computer OMRON PT (Programmable and writing I/O memory, changing the operat- Terminal) ing mode, and force-setting/resetting bits can be executed by issuing host link commands or FINS commands from the host computer to the CPU Unit.
Page 241: Host Link Communications
Section 6-3 Serial Communications 6-3-1 Host Link Communications The following table shows the host link communication functions available in CS/CJ PCs. Select the method that best suits your application. Command flow Command type Communications method Configuration Create frame in the host com- Host computer Directly connect the host computer in a 1:1 Host link command...
Page 242 Section 6-3 Serial Communications 2. The FINS command is transmitted from the PC with a host link header and terminator attached. A program must be prepared in the host computer to analyze the FINS commands and return the proper responses. Procedure Power OFF Connect the host computer...
Page 243 Section 6-3 Serial Communications Header Name Function code EM AREA READ Reads the contents of the specified number of EM Area words, starting from the specified word. CIO AREA WRITE Writes the specified data (word units only) to the CIO Area, starting from the specified word.
Page 244 Section 6-3 Serial Communications Header Name Function code INITIALIZE (command only) Initializes the transmission control procedure of all PCs connected to the host computer. Undefined command This response is returned if the header code of a command was not (response only) recognized.
Page 245 Section 6-3 Serial Communications Type Command Name Function code File Memory FILE NAME READ Reads the file memory’s file information. SINGLE FILE READ Reads the specified amount of data from the specified point in a file. SINGLE FILE WRITE Writes the specified amount of data from the specified point in a file.
Page 246: Protocol Communications
Section 6-3 Serial Communications 6-3-2 No-protocol Communications The following table lists the no-protocol communication functions available in CS/CJ PCs. Transfer direction Method Max. amount Frame format Other of data functions Start code End code Data transmission Execution of TXD(236) 256 bytes Yes: 00 to FF Yes: Send delay...
Page 247: Nt Link (1:N Mode)
Section 6-3 Serial Communications ted, and when receiving with RXD(235), just the data itself is stored in I/O memory. Up to 256 bytes (including the start and end codes) can be trans- ferred in no-protocol mode. The following table shows the message formats that can be set for transmis- sions and receptions in no-protocol mode.
Page 248: Startup Settings And Maintenance
Section 6-4 Startup Settings and Maintenance PC Setup Communications Programming Name Settings Default values Other conditions port Console setting contents address Peripheral port Serial communica- 02 Hex: NT Link 00 Hex: Host Link Turn ON pin 4 on tions mode (1:N mode) the CPU Unit DIP Bits:...
Page 249 Section 6-4 Startup Settings and Maintenance I/O memory PROGRAM CIO and Retain other areas ONITOR or RUN Hot Stop When the IOM Hold Bit (A50012) is ON, all data* in I/O memory will also be retained when the CPU Unit is switched from RUN/MONITOR mode to PRO- GRAM mode to stop program execution.
Page 250: Startup Mode Setting
Section 6-4 Startup Settings and Maintenance PC Setup Program- Name Setting Default ming Con- sole address 80 bit 15 IOM Hold Bit Sta- 0: The IOM Hold Bit is cleared to 0 when tus at Startup (Cleared) power is turned on. 1: The IOM Hold Bit is retained when power is turned on.
Page 251: Power Off Detection Delay Setting
Section 6-4 Startup Settings and Maintenance &DXWLRQ If Output Unit’s external power supply goes on before the PC’s power supply, the Output Unit may malfunction momentarily when the PC first goes on. To prevent any malfunction, add an external circuit that prevents the Output Unit’s external power supply from going on before the power supply to the PC itself.
Page 252: Program Protection
Section 6-4 Startup Settings and Maintenance Name Addresses Function Start-up Time A510 and A511 Contain the time at which the power was turned on. Power Interruption A512 and A513 Contain the time at which the power Time was last interrupted. Total Power ON Time A523 Contains the total time (in binary) that...
Page 253: Diagnostic Functions
The following information can be read for CS/CJ-series Units from the CX- Programer. • Manufacturing information (lot number, serial number, etc.): Facilitates providing information to OMRON when problems occur with Units. • Unit information (type, model number, correct rack/slot position): Provides an easy way to obtain mounting information.
Page 254: Error Log
Section 6-5 Diagnostic Functions • Error Log • Output OFF Function • Failure Alarm Functions (FAL(006) and FALS(007)) • Failure Point Detection (FPD(269)) Function 6-5-1 Error Log Each time that an error occurs in a CS/CJ-series PC, the CPU Unit stores error information in the Error Log Area.
Page 255: Output Off Function
Section 6-5 Diagnostic Functions 6-5-2 Output OFF Function As an emergency measure when an error occurs, all outputs from Output Units can be turned OFF by turning ON the Output OFF Bit (A50015). The operating mode will remain in RUN or MONITOR mode, but all outputs will be turned OFF.
Page 256: Failure Point Detection
Section 6-5 Diagnostic Functions 6-5-4 Failure Point Detection FPD(269) performs time monitoring and logic diagnosis. The time monitoring function generates a non-fatal error if the diagnostic output isn’t turned ON within the specified monitoring time. The logic diagnosis function indicates which input is preventing the diagnostic output from being turned ON.
Page 257: Peripheral Servicing Priority Mode
Section 6-6 Peripheral Servicing Priority Mode Auxiliary Area Flags and Words Name Address Operation Error Code A400 When an error occurs, its error code is stored in A400. FAL Error Flag A40215 ON when FAL(006) is executed. FALS Error Flag A40106 ON when FALS(007) is executed.
Page 258 Section 6-6 Peripheral Servicing Priority Mode over program execution, such as process control applications that require rapid response for host monitoring. • Up to five Units or ports can be specified for priority servicing. CPU Bus Units and CS/CJ Special I/O Units are specified by unit number. •...
Page 259 Section 6-6 Peripheral Servicing Priority Mode RS-232C port Peripheral port Address in Pro- Settings Default Function New set- gramming Console ting’s effec- tiveness Word Bit(s) 08 to 00: Disable priority servicing Takes effect 05 to FF at the start 05 to FF: Time slice for instruction execution (Hex) of operation (5 to 255 ms in 1-ms increments)
Page 260 Section 6-6 Peripheral Servicing Priority Mode When Peripheral Servicing Priority Mode is not being used, the program exe- cution time will be stored. This value can be used in determining appropriate settings for the slice times. Words Contents Meaning Refreshing A266 and A267 00000000 to The contents is...
Page 261 Section 6-6 Peripheral Servicing Priority Mode Operation Time slice for Time slice for Time slice for program execution peripheral servicing program execution Peripheral Peripheral Normal peripheral servicing servicing servicing Interrupted Execution Interrupted Execution Execution I/O refresh Program section requiring data concurrence DI(693) executed.
Page 262: Other Functions
Section 6-7 Other Functions Applicable Program Areas Area Applicability Block programming areas Step programming areas Subroutine programs Interrupt tasks Condition Flags Flag Label Operation Error Flag Turns ON if EI(694) is executed in an interrupt task. Other Functions 6-7-1 I/O Response Time Settings The input response times for CS/CJ Basic I/O Units can be set by Rack and Slot number.
Page 263: I/O Area Allocation
Section 6-7 Other Functions 6-7-2 I/O Area Allocation A Programming Device can be used to set the first word for I/O allocation in Expansion Racks (CS/CJ Expansion Racks and C200H Expansion I/O Racks). This function allows each Rack’s I/O allocation area to be fixed within the range CIO 0000 to CIO 0999.
Page 264: Program Transfer, Trial Operation, And Debugging
SECTION 7 Program Transfer, Trial Operation, and Debugging This section describes the processes used to transfer the program to the CPU Unit and the functions that can be used to test and debug the program. Program Transfer..........Trial Operation and Debugging.
Page 265: Program Transfer
Section 7-1 Program Transfer Program Transfer A Programming Device is used to transfer the programs, PC Setup, I/O mem- ory data, and I/O comments to the CPU Unit with the CPU Unit in PROGRAM mode. Program Transfer Procedure for CX-Programmer 1,2,3...
Page 266: Differential Monitoring
Section 7-2 Trial Operation and Debugging The following areas can be force-set and reset. CIO (I/O bits, data link bits, CPU Bus Unit bits, Special I/O Unit bits, Inner Board bits, SYSMAC BUS bits, Optical I/O Unit bits, work bits), WR Area, Timer Completion Flags, HR Area, Counter Completion Flags.
Page 267 Section 7-2 Trial Operation and Debugging tions at a time from the CX-Programmer. The function is thus designed for minor program changes without stopping the CPU Unit. Online editing is possible simultaneously from more than one computer run- ning the CX-Programmer as well as from a Programming Console as long as different tasks are edited.
Page 268 Section 7-2 Trial Operation and Debugging 3. Select Program, Online Edit, and then Begin. 4. Edit the instructions. 5. Select Program, Online Edit, and then Send Changes The instructions will be check and, if there are no errors, they will be transferred to the CPU Unit.
Page 269: Tracing Data
Section 7-2 Trial Operation and Debugging Related Auxiliary Bits/Words Name Address Description Online Edit Disable Bit Validator A52700 to Validates the Online Edit Disable Bit (A52709). A52707 Not 5A: Online Edit Disable Bit invalid Online Edit Disable Bit valid Online Edit Disable Bit A52709 To disable online editing, turn this bit ON and set the Online Edit Disable Bit Validator (A52700 to A52707) to 5A.
Page 270 Section 7-2 Trial Operation and Debugging No. of words Setting range sampled –1999 to 2000 –1332 to 1333 –999 to 1000 –799 to 800 –665 to 666 –570 to 571 –499 to 500 Positive delay: Store data delayed by the set delay. Negative delay: Store previous data according go to the set delay.
Page 271 Section 7-2 Trial Operation and Debugging 5. Use CX-Programmer to read the trace data. a) Select Data Trace from the PC Menu. b) Select Select from the Execution Menu. c) Select Execute from the Execution Menu. d) Select Read from the Execution Menu. Related Auxiliary Bits/Words Name Address...
Page 272: Cqm1H, Cvm1, And Cv-Series Pcs
Appendix A PC Comparison Charts: CJ-series, CS-series, C200HG/HE/HX, CQM1H, CVM1, and CV-series PCs Functional Comparison Item CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H Basic features No. of I/O 1,280 points 5,120 points 1,184 points 6,144 points 512 points pacity points Program 60 Ksteps...
Page 273 Appendix A PC Comparison Charts Item CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H Number of I/O Units 40 Units 89 Units (Includ- 10 or 16 Units 64 Units 16 Units Units/Racks ing Slave Racks) (8 Racks x 8 Units) CPU Bus Units 16 Units 16 Units...
Page 274 Appendix A Appendix A PC Comparison Charts PC Comparison Charts Item CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H Serial commu- Peripheral nications ripher- al port Host Link (SYSMAC (Possible with WAY) connection to peripheral inter- face) No protocol NT Link Peripheral Unit built-in...
Page 275 Appendix A PC Comparison Charts Item CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H Initial Input response time Set in PC Setup Set in PC Setup Set in PC Setup set- for Basic I/O Unit tings Rack first addresses Set in I/O table Set in I/O table Set in PC Setup from Program-...
Page 276 Appendix A Appendix A PC Comparison Charts PC Comparison Charts Item CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H Initial Power Restart Continuation Set in PC Setup set- supply Bit Hold tings Startup mode Set in PC Setup Set in PC Setup Set in PC Setup Set in PC Setup Set in PC Setup...
Page 277 Appendix A PC Comparison Charts Item CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H Auxil- Condi- ER, CY, <, >, =, Input using sym- Input using sym- iary tion Always ON/OFF bols, e.g., ER. bols, e.g., ER. Area Flags Flag, etc. Clock pulses Input using sym- Input using sym-...
Page 278 Appendix A Appendix A PC Comparison Charts PC Comparison Charts Item CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H Auxil- Power Power Interruption iary supply Flag Area, Power Interruption contd Time Power ON Time Time at Power Inter- ruption (including power OFF) Power ON Time Time at Power Inter-...
Page 279 Appendix A PC Comparison Charts Item CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H I/O Memory CIO Area WR Area Temporary Relay Area Auxiliary Area SR Area Link Area Yes (Data Link Yes (Data Link Yes (Data Link Area) Area) Area) C200H Special I/O Yes (CIO Area)
Page 280 Appendix A Appendix A PC Comparison Charts PC Comparison Charts Instruction Comparison Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H monic Sequence LOAD/AND/ Input AND/ Instructions AND LOAD/ OR LOAD LD/OR CONDITION Yes (*1) CONDITION DOWN Yes (*1) BIT TEST TST/ Yes (Bit position...
Page 281 Appendix A PC Comparison Charts Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H monic Timer and TIMER Yes (Decre- Yes (Decre- Yes (Decre- Yes (Decre- Yes (Decre- Counter ments specified ments specified ments specified ments specified ments specified Instructions in binary or in binary or...
Page 282 Appendix A Appendix A PC Comparison Charts PC Comparison Charts Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H monic Data Move- MOVE ment DOUBLE MOVL Instruction MOVE MOVE NOT DOUBLE MVNL MOVE DATA XCHG EXCHANGE DOUBLE XCGL DATA EXCHANGE MOVE QUICK MOVQ BLOCK...
Page 283 Appendix A PC Comparison Charts Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H monic Data Shift SHIFT REG- Instructions ISTER REVERS- SFTR IBLE SHIFT REGISTER ASYNCHRO- ASFT NOUS SHIFT REGISTER WORD SHIFT WSFT Yes (Same as Yes (Same as CV: 3 operands) CV: 3 operands) ARITHMETIC...
Page 284 Appendix A Appendix A PC Comparison Charts PC Comparison Charts Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H monic Increment INCREMENT ++B/– – Yes (++B/– –B) Yes (++B/– –B) Yes (INC/DEC) Yes (INC/DEC) Yes (INC/DEC) and Decre- BCD/DECRE- B (INC/ ment MENT BCD...
Page 285 Appendix A PC Comparison Charts Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H monic Logic LOGICAL ANDW, Instructions AND/LOGI- ORW, CAL OR/ XORW, EXCLUSIVE XNRW OR/EXCLU- SIVE NOR DOUBLE ANDL, LOGICAL ORWL, AND/DOU- XORL, BLE LOGICAL XNRL OR/DOUBLE EXCLUSIVE OR/DOUBLE EXCLUSIVE...
Page 286 Appendix A Appendix A PC Comparison Charts PC Comparison Charts Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H monic Table Data SET STACK SSET Yes (Four words Yes (Four words Yes (Four words Processing of stack control of stack control of stack control Instructions information.
Page 287 Appendix A PC Comparison Charts Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H monic Subrou- SUBROU- SBS/ Yes (Subroutine Yes (Subroutine Yes (Subroutine Yes (Subroutine Yes (Subroutine tines TINE CALL/ SBN/ number specified number specified number specified number specified number specified Instructions SUBROU-...
Page 288 Appendix A Appendix A PC Comparison Charts PC Comparison Charts Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H monic Basic I/O I/O REFRESH IORF Yes (Used for Yes (Used for Unit C200H Group-2 C200H Group-2 Instructions High-density I/O High-density I/O Units and Spe- Units and Spe-...
Page 289 Appendix A PC Comparison Charts Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H monic Serial Com- RECEIVE Yes (Number of Yes (Number of Yes (Number of Yes (Number of munica- stored bytes stored bytes stored bytes stored bytes tions specified in specified in...
Page 290 Appendix A Appendix A PC Comparison Charts PC Comparison Charts Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H monic Display DISPLAY Yes (Messages Yes (Messages Yes (Messages Yes (Messages Yes (Messages Instructions MESSAGE ended by NUL) ended by NUL) ended by CR) ended by CR) ended by CR)
Page 291 Appendix A PC Comparison Charts Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV Series CQM1H monic Other SET CARRY/ STC/ Instructions CLEAR CARRY LOAD CCL/ FLAGS/SAVE FLAGS EXTEND Yes (*1) MAXIMUM CYCLE TIME CYCLE TIME SCAN LOAD REGIS- REGL/ TER/SAVE REGS REGISTER SELECT EM...
Page 292: Changes From Previous Host Link Systems
Appendix B Changes from Previous Host Link Systems There are differences between Host Link Systems created using the CS/CJ-series Serial Communications Boards (CS Series only) and Unit in comparison to Host Link Systems created with Host Link Units and CPU Units in other PC product series.
Page 293 Appendix B Changes from Previous Host Link Systems Previous Model number Changes required for CS/CJ-series product products Wiring Other CVM1 or CV- CVM1/CV-CPU##-E No changes have been made It may be possible to use the host computer series CPU in wiring. programs without alteration as long as the Units same communications settings (e.g., baud rate)
Page 294 Appendix B Changes from Previous Host Link Systems Previous Model number Changes required for CS/CJ-series product products Wiring Other CVM1 or CV- CVM1/CV-CPU##-E No changes have been made It may be possible to use the host computer series CPU Units in wiring.
Page 296: Index
Index internal structure operation addressing C-series Host Link Units index registers changes in communications specifications – indirect addresses C-series Units memory addresses changes in communications specifications operands CVM1 Units See also index registers – changes in communications specifications alarms CV-series PCs user-programmed alarms comparison applications...
Page 297 Index access error Host Link communications error log Host Link Units failure point detection changes in communications specifications fatal hot starting illegal instruction error hot stopping instruction processing error program input programming errors UM overflow error I/O allocations user-programmed errors first word settings executable status I/O interrupts...
Page 298 Index index registers See also I/O memory – input and output instructions See also user memory input differentiation Memory Cards instruction conditions initializing interrupt control instructions operations logic instructions messages loops minimum (fixed) cycle time network instructions mnemonics operands inputting programming locations MONITOR mode restrictions in tasks...
Page 299 Index power flow description range instructions power OFF detection delay read/write-protection power OFF interrupts – tasks record-table instructions precautions refreshing applications cyclic refreshing general I/O refreshing I/O refreshing immediate refreshing interrupt tasks IORF(097) operating environment RS-232C ports programming changes from previous products safety RS-422A/485 ports previous products...
Page 300 Index execution conditions execution time features flags interrupt tasks introduction limitations operation of Condition Flags relationship to block programs See also cyclic tasks See also interrupt tasks status task control instructions task numbers timers text strings operands text string processing instructions time setting the clock trial operation...
Page 302: Revision History
Revision History A manual revision code appears as a suffix to the catalog number on the front cover of the manual. Cat. No. W394-E1-1 Revision code The following table outlines the changes made to the manual during each revision. Page numbers refer to the previous version.

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Cs1g/h-cpu-ev1 series Cj1g-cpu series Sysmac cj series

Omron SYSMAC CS Series Programming Manual

Table of Contents

Precautions

Section 1 CPU Unit Operation

Section 2 Programming

Section 3 Instruction Functions

Section 4 Tasks

Section 5 File Memory Functions

Section 6 Advanced Functions

Section 7 Program Transfer, Trial Operation, and Debugging

Program Transfer, Trial Operation, and Debugging

Index

Revision History

Quick Links

Chapters

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Summary of Contents for Omron SYSMAC CS Series

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Table of Contents