Instruction Execution Times and Number of Steps
9-5-28 Other Instructions
Instruction
Mnemonic Code Length
SET CARRY STC
CLEAR
CLC
CARRY
SELECT EM
EMBC
BANK
EXTEND
WDT
MAXIMUM
CYCLE
TIME
SAVE CON-
CCS
DITION
FLAGS
LOAD CON-
CCL
DITION
FLAGS
CONVERT
FRMCV
ADDRESS
FROM CV
CONVERT
TOCV
ADDRESS
TO CV
DISABLE
IOSP
PERIPH-
ERAL SER-
VICING
ENABLE
IORS
PERIPH-
ERAL SER-
VICING
Note
(steps)
CPU6@HA
(See
(Duplex CPU)
note 1.)
040
1
0.06
041
1
0.06
281
2
14.6
094
2
15.1
282
1
9.2
283
1
10.5
284
3
10.2
285
3
11.9
287
1
---
(See note 2.)
288
1
---
(See note 2.)
1. When a double-length operand is used, add 1 to the value shown in the
length column in the following table.
2. Not supported by Duplex CPU Systems.
Execution time (µs)
CPU6@H
CPU@@SA
CPU6@S
(Duplex CPU)
(Single
(Single
CPU)
0.06
0.06
0.06
0.06
0.06
0.06
14.0
14.5
14.0
15.0
15.1
15.0
8.6
9.2
8.6
9.8
10.5
9.8
13.6
10.2
13.6
11.9
11.9
11.9
---
12.5
13.9
(See note 2.)
---
56.5
63.6
(See note 2.)
Section 9-5
Conditions
CPU4@S
(Single
CPU)
CPU)
0.06
---
0.06
---
15.1
---
19.7
---
12.5
---
13.9
---
19.9
---
17.2
---
19.8
---
92.3
---
401
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