Analog Devices ADSP-SC58 Series Hardware Reference Manual page 3567

Table 54-5: Bus Master IDs (Continued)
SCB
SCB8
DSP MEM
SCB Programming Model
The following sections provide information for programming the SCB properly.
Programming SCB Arbitration
Each slave interface has a QoS value (priority) associated with both read and write channels. These values are 4 bits
and are located in the SCB0_MST[n]_RQOS
frastructure, all transactions are allocated this programmable local QoS value. The arbitration of the transaction
throughout the infrastructure uses this QoS. At any arbitration node, a fixed priority exists for transactions with a
different QoS. The highest value has the highest priority.
If there are coincident transactions at an arbitration node with the same QoS that require arbitration, then the net-
work uses a Least Recently Granted (LRG) algorithm. At each switch, the master with the highest QoS acquires
access and that switch output takes the QoS value of the winner for that transaction. At the next switch slave inter-
face, the master uses the QoS value of the winner. QoS can have values from 0 (lowest priority) to 15 (highest prior-
ity).
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Masters
DMA30 LP0
DMA36 LP1
MLB
DBG
ETR
DMA39 (MSMDMA CH1)
DMA40 (MSMDMA CH0)
PCIe
DMA43 (HSMDMA CH0)
DMA44 (HSMDMA CH1)
DMA41 (FFTA CH0)
DMA42 (FFTA CH1)
SH0 (DPORT)
SH0 (IPORT)
SH1 (DPORT)
SH1 (IPORT)
PL310 (M0)
PL310 (M1)
and
Hex ID Values
0x601, 0x611 (descriptor fetch)
0x602, 0x612 (descriptor fetch)
0x600
0x603
0x604
0x1001, 0x1011
0x1000, 0x1010
There are 32 values. "x" is either a 0 or 1.
0x1200, 0x1210
0x1201, 0x1211
0x1202, 0x1212
0x1203, 0x1213
0x1400
0x1401
0x1402
0x1403
There are 32 values. "x" is either a 0 or 1.
There are 32 values. "x" is either a 0 or 1.
SCB0_MST[n]_WQOS
SCB Programming Model
registers. At the entry point to the in-
54–13