Device Types For Melsec Data Link Functions - Mitsubishi MELSEC-Q Series User Manual

10
FUNCTIONS AND PROGRAMMING

10.3.11 Device types for MELSEC data link functions

Device types used for the MELSEC data link functions may be either code numbers or
device names.
(1) Common device types
Device type
Code
DEC.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
16002
16003
17
18
18002
18003
19
20
21
22
220
22000 to 22256 55F0
23
24
25
26
27
28
30
33
Table10.18 Common device types of MELSEC data link functions
Device name
HEX.
1 DevX
H
2 DevY
H
3 DevL
H
4 DevM
H
5 DevSM
H
6 DevF
H
7 DevTT
H
8 DevTC
H
9 DevCT
H
A DevCC
H
B DevTN
H
C DevCN
H
D DevD
H
E DevSD
H
F DevTM
H
10 DevTS
H
3E82 DevTS2
H
3E83 DevTS3
H
11 DevCM
H
12 DevCS
H
4652 DevC2
H
4653 DevC3
H
13 DevA
H
14 DevZ
H
15 DevV
H
16 DevR
H
00DC DevZR
H
DevER(0) to
to 56F0
H H
DevER(256)
17 DevB
H
18 DevW
H
19 DevQSB
H
1A DevSTT
H
1B DevSTC
H
1C DevQSW
H
1E DevQV
H
21 DevMRB
H
* 1 The device name specification (macro) is defined in this function's include file "MdFunc.h".
( Section 10.2.3 (1) )
* 2 Even if a non-existent device is specified in mdRandR and mdRandREx functions, they complete
normally. (The read data is "-1".)
* 3 This device is the CC-Link (own station) module's buffer memory.
10.3 Programming Using MELSEC Data Link Functions
10.3.11 Device types for MELSEC data link functions
*1
X
Y
L
M
SM (special relay), SB (link special relay for MELSECNET/H,
CC-Link IE controller network and CC-Link)
F
T (contact)
C (coil)
C (contact)
C (coil)
T (current value)
C (current value)
D
SD (special register), SW (link special register for MELSECNET/
H, CC-Link IE controller network and CC-Link)
T (main setting)
T (sub setting 1)
T (sub setting 2)
T (sub setting 3)
C (main setting)
C (sub setting 1)
C (sub setting 2)
C (sub setting 3)
A
Z
V (index register)
R (file register)
ZR (file register)
ER (extension file register)
Argument value of device name (0 to 256
B
W
Q/QnA link special relay (within Q/QnACPU)
Retentive timer (contact)
Retentive timer (coil)
Q/QnA link special register (within Q/QnACPU)
Q/QnA edge relay (within Q/QnACPU)
Own station random access buffer
Device
*2
) is Block No.
*3
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