APPENDICES
Classifi-
Symbol
cations
(None)
Bit device
status
!
*
Logical
operation
+
==
Comparison
!=
operation
<
(2) Transition conditional expressions
Processing time of transition conditional expressions
Instruction
M0
ON (Normally open
X100
contact)
(Completion of
PX0
condition)
U3E1\G10000.0
!M0
OFF (Normally
!X100
closed contact)
(Completion of
!PX0
condition)
!U3E1\G10000.0
M0*M1
X100*X101
Logical AND
PX0*PX1
U3E1\G10000.0*U3E1\G10000.1
M0+M1
X100+X101
Logical OR
PX0+PX1
U3E1\G10000.0+U3E1\G10000.1
#0==#1
D800==D801
U3E1\G10000==U3E1\G10001
#0L==#2L
Equal to
(Completion of
D800L==D802L
condition)
U3E1\G10000L==U3E1\G10002L
#0F==#4F
D800F==D804F
U3E1\G10000F==U3E1\G10004F
#0!=#1
D800!=D801
U3E1\G10000!=U3E1\G10001
#0L!=#2L
Not equal to
(Completion of
D800L!=D802L
condition)
U3E1\G10000L!=U3E1\G10002L
#0F!=#4F
D800F!=D804F
U3E1\G10000F!=U3E1\G10004F
#0<#1
D800<D801
U3E1\G10000<U3E1\G10001
#0L<#2L
Less than
(Completion of
D800L<D802L
condition)
U3E1\G10000L<U3E1\G10002L
#0F<#4F
D800F<D804F
U3E1\G10000F<U3E1\G10004F
Operation expression
APP - 20
Q173DSCPU/
Q173DCPU(-S1)/
Q172DSCPU
Q172DCPU(-S1)
Unit [ µ s]
Unit [ µ s]
1.0
1.0
3.0
3.0
0.5
1.5
1.0
1.5
3.0
3.5
0.5
1.5
1.5
2.0
5.0
5.5
1.5
2.5
1.5
1.5
6.0
7.0
1.5
2.5
1.0
1.5
1.5
2.5
1.5
2.0
2.0
2.5
2.0
2.5
3.0
4.0
1.5
1.5
2.0
2.5
1.5
1.5
1.5
2.5
2.0
2.0
3.0
3.5
1.5
1.5
2.5
2.5
2.0
2.0
2.5
2.5
2.0
2.0
3.0
3.5