Summary of Contents for Mitsubishi Electric MELSEC A Series
MELSEC A/Q Series Programmable Logic Controller Manual Analog Input Module A68ADN MITSUBISHI ELECTRIC EUROPE B.V. FACTORY AUTOMATION...
REVISIONS *The manual number is given on the bottom left of the back cover. Print Date *Manual Number Revision Jul., 1991 IB (NA) 66307-A First edition Jul., 1992 IB (NA) 66307-B Correction Sections 3.2 (Table 3.2), 4.2, 5.3 , APPENDIX 2 Jun., 1994 IB (NA) 66307-C Correction...
• • • • • • • • SAFETY PRECAUTIONS (Read these precautions before using.) When using Mitsubishi equipment, thoroughly read this manual and the associated manuals introduced in this manual. Also pay careful attention to safety and handle the module properly. These precautions apply only to Mitsubishi equipment.
[System Design Precautions] DANGER • Safety circuits should be installed external to the programmable controller to ensure that the system as a whole will continue to operate safely in the event of an external power supply malfunction or a programmable controller failure. Erroneous outputs and operation could result in an accident.
[System Design Precautions ] CAUTION • Do not bundle control lines or communication wires together with main circuit or power lines, or lay them close to these lines. As a guide, separate the lines by a distance of at least 100 mm, otherwise malfunctions may occur due to noise.
[Cautions on Wiring] DANGER • Switch off the external power supply before staring installation and wiring work Failure to do so could result in electrical shocks and equipment damage. • After installation and wiring is completed, be sure to attach the terminal cover before switching the power ON and starting operation Failure to do so could result in electrical shocks.
[Cautions on Startup and Maintenance] DANGER • Do not touch terminals while the power is ON. This will cause malfunctions. • Make sure that the battery is connected properly. Do not attempt to charge or disassemble the battery, do not heat the battery or place it in a flame, and do not short or solder the battery. Incorrect handling of the battery can cause battery heat generation and ruptures which could result in fire or injury.
1. INTRODUCTION MELSEC-A 1. INTRODUCTION This manual gives specifications, handling, programming procedures, etc. for the A68ADN analog to digital converter module (hereafter called the A68ADN) for use with MELSEC-A series PC CPU modules. An A68ADN converts analog signals (voltage or current) into 16-bit, signed binary digital values, as shown in the following figure.
1. INTRODUCTION MELSEC-A (4) Conversion enable/disable setting (for each channel) Whether A-D conversion is enabled or disabled can be set for each channel. By setting "disable" for the unused channels, conversion speed can be increased. (5) Offset/gain adjustment without dials (for each channel) Offset and gain can be set by simply inputting the required value (voltage or current) and turning the setting switch ON.
2. SYSTEM CONFIGURATIONS MELSEC-A 2. SYSTEM CONFIGURATIONS Overall Configurations (1) Figure 2.1 shows the overall system configuration when the A68ADN is used with a building block-type PC CPU Building block-type PC CPU 68ADN OFFSET GAIN TEST ANALOG 10 V 4~20mA Main base unit A-D converter module A38B...
2. SYSTEM CONFIGURATIONS MELSEC-A (2) Figure 2.2 shows the overall system configuration when the A68ADN is used with a compact-type PC CPU Compact-typ PC CPU I/O cable A0J2C01 Type A0J2C03 A0J2C10 68ADN OFFSET GAIN TEST ANALOG 10 V 4~20mA A–D converter module A0J2 I/O module Type A68ADN...
2. SYSTEM CONFIGURATIONS MELSEC-A Applicable Systems The A68ADN can be used for the systems indicated below. Please note that installation of the A68ADN in other systems is not possible. (1) The following PC CPU modules and remote I/O module can be used with an A68ADN: Applicable models A0J2CPU(P21/R21)
3. SPECIFICATIONS MELSEC-A 3. SPECIFICATIONS General Specifications The following table shows the general specifications of the A68ADN. Table 3.1 General Specifications Item Specifications Operating ambient 0 to 55 °C temperature Storage ambient -20 to 75 °C temperature Operating ambient 10 to 90 %RH, non-condensing humidity Storage ambient 10 to 90 %RH, non-condensing...
3. SPECIFICATIONS MELSEC-A Performance Specifications The following table gives the performance specifications of the A68ADN. Table 3.2 Performance Specifications Item Specifications Voltage : -10 to 0 to 10 VDC (Input resistance: 1 MΩ) Can be set with th Analog input input terminal Current : -20 to 0 to 20 mA (Input resistance: 250 kΩ) Signed 16-bit binary...
3. SPECIFICATIONS MELSEC-A I/O Conversion Characteristics Input/output (hereafter I/O) conversion characteristics are expressed by the angle of the line connecting the offset value and gain value used to convert the analog signals, input to the PC CPU, into digital values. This is shown in Figure 3.1 below. Example : Resolution setting : 1/4000 Offset value...
3. SPECIFICATIONS MELSEC-A 3.3.1 Voltage input characteristics Figure 3.2 shows the voltage input characteristics for three different offset/gain combinations. 1/4000 1/8000 1/12000 setting setting setting Practical analog input range Setting example  4095 8191 12287 Set value: 0 V Gain value: 25 V 2000 4000 6000...
3. SPECIFICATIONS MELSEC-A 3.3.2 Current input characteristics Figure 3.3 shows the voltage input characteristics for three different offset/gain combinations 1/4000 1/8000 1/12000 setting setting setting Practical analog input range 4095 8191 12287 Setting example  Offset value: 0 mA 2000 4000 6000 Gain value:...
3. SPECIFICATIONS MELSEC-A 3.3.3 Relationship between the offset/gain setting and the digital output values (1) Resolution Resolution is obtained using the following expression: • Voltage input (Gain value) – (Offset value) × 1000 (mV) Resolution = 2 0 0 0 ( f o r 1 / 4 0 0 0 s e t t i n g ) / 4 0 0 0 (f o r 1 / 8 0 0 0 s e t t i n g ) / 6 0 0 0 ( f o r 1 / 1 2 0 0 0 •...
3. SPECIFICATIONS MELSEC-A 2003 2002 2001 Digital output (2) (3) 2000 1999 1998 1997 1996 Offset Gain Reso- Analog Input Value (V) Value Value lution 2.4950 2.4975 2.5000 2.5025 1/4000 2.4975 2.5000 2.5025 2.5050 1.2475 1.2488 1.2500 1.2513 2.5 V 1/8000 1.2488 1.2500...
3. SPECIFICATIONS MELSEC-A 2003 2002 2001 Digital output 2000 1999 1998 1997 1996 Offset Gain Reso- Analog Input Value (mA) Value Value lution 4.9900 5.0000 1/4000 5.0000 5.0100 2.4950 2.5000 1/8000 0 mA 5 mA 2.5000 2.5050 1.6634 1.6667 1/12000 1.6667 1.6700 19.9680...
3. SPECIFICATIONS MELSEC-A Functions Table 3.1 A68ADN Functions Item Descriptions Section Ref. • Enable/disable setting is possible for each individual channel. A-D conversion (Default: Enable for all channels) enable/disable 3.7.1 • Sampling time can be shortened by setting "disable" for the setting unused channels.
3. SPECIFICATIONS MELSEC-A Maximum Conversion Speed Conversion speed is the period of time between channel switching and the writing of the digital value to buffer memory. 3.5.1 Conversion speed per channel Conversion speed per channel is 20 ms. If more than one channel is used, the sampling time will be "(20 ms) × (number of conversion-enabled channels)".
3. SPECIFICATIONS MELSEC-A I/O List for PC CPU The A68ADN uses 32 input and 32 output device points for data communications with the PC CPU. I/O signal assignment and functions are shown in Table 5.1. Device X indicates an input signal from the A68ADN to the PC CPU and device Y an output signal from the PC CPU to the A68ADN.
3. SPECIFICATIONS MELSEC-A (2) A – D conversion ready (X1) The X1 signal goes ON when A-D conversion processing is ready in a normal (other than test) mode when the power supply to the PC CPU goes ON or the PC CPU is reset.
3. SPECIFICATIONS 0(/6(&0$ 0(/6(&0$ 0(/6(&0$ 0(/6(&0$ MELSEC-A Buffer Memory The A68ADN uses the buffer memory (not battery-backed) for data communications with a PC CPU. Buffer memory allocations are shown below. Address (decimal) Default value ....See section 3.7.1 A-D conversion-enabled/disabled setting 00FFH (all channels enabled) Averaging processing specification 0 (sampling processing for all channels)
3. SPECIFICATIONS 0(/6(&0$ 0(/6(&0$ 0(/6(&0$ 0(/6(&0$ MELSEC-A 3.7.1 A-D conversion-enabled/disabled setting Whether A-D conversion is to be executed or not is written to buffer memory address 0 for each channel ("1" for enable and "0" for disable). The sampling cycle can be shortened by setting "disable" for the unused channels The default value for each channel is set as an A-D conversion.
3. SPECIFICATIONS 0(/6(&0$ 0(/6(&0$ 0(/6(&0$ 0(/6(&0$ MELSEC-A 3.7.2 Setting for sampling processing/averaging processing (1) Digital value output in sampling processing and averaging processing (a) Sampling processing The analog values input to the channels are converted 1:1 to digital output values. These digital output values are then stored in buffer memory. (b) Averaging processing The A68ADN does the A-D conversion for any channels which the PC CPU has specified for averaging processing.
3. SPECIFICATIONS 0(/6(&0$ 0(/6(&0$ 0(/6(&0$ 0(/6(&0$ MELSEC-A (2) Designation of averaging processing and selection between time averaging and count averaging (a) When the power is turned ON and the A68ADN A-D conversion-ready signal is ON, all channels are set for sampling processing. (b) For selection of sampling processing or averaging processing, use address 1 of the buffer memory.
3. SPECIFICATIONS 0(/6(&0$ 0(/6(&0$ 0(/6(&0$ 0(/6(&0$ MELSEC-A 3.7.3 Digital output values Digital values after A – D conversion are stored to buffer memory addresses 10 to 17 for each channel. Digital output values are 16-bit, singed binary. The ranges vary depending on the resolution setting, as indicated below: b15 b14 b13 b12 b11 b10 b9 Address 10 to 17...
3. SPECIFICATIONS 0(/6(&0$ 0(/6(&0$ 0(/6(&0$ 0(/6(&0$ MELSEC-A 3.7.5 A-D conversion-completion flag (1) When the power is turned ON, the A – D conversion-ready signal (X1) goes ON This indicates that the A – D conversion-completion flag is ready for all chan- nels from 1 to 8.
4. PRE-OPERATION SETTINGS AND PROCEDURES MELSEC-A 4. PRE-OPERATION SETTINGS AND PROCEDURES Handling Instructions (1) Protect the A68ADN and the terminal block from impacts. (2) Do not remove printed circuit boards from the housing. There are no user- serviceable parts on the boards. (3) Ensure that no conductive debris can enter the module.
4. PRE-OPERATION SETTINGS AND PROCEDURES MELSEC-A Nomenclature 68ADN RUN LED Indicates the operating status of the A68ADN. OFFSET (Normal mode) : During normal operation GAIN Flashing : Write data error : 5V power OFF or watchdog timer error (Test mode) : When the OFFSET switch or the GAI TEST switch is in the ON position.
4. PRE-OPERATION SETTINGS AND PROCEDURES MELSEC-A Offset/Gain Settings To change the I/O characteristics, follow the chart below. The factory settings are: Voltage input ..Offset value : 0 V Gain value : 5 V Current input ..Offset value : 0 mA Gain value : 20 mA Start...
4. PRE-OPERATION SETTINGS AND PROCEDURES MELSEC-A POINTS (1) Set the offset and gain values under conditions of actual use. (2) The offset and gain values are stored in the A68ADN and are not erased if the power is turned OFF. (3) Do offset/gain setting with the PC CPU in the stop mode.
4. PRE-OPERATION SETTINGS AND PROCEDURES MELSEC-A Wiring 4.4.1 Wiring instructions Take the following precautions to protect external wiring from noise: (1) Separate the AC and DC wiring. (2) Separate the main circuit and/or high voltage wiring from the control and signal wiring.
5. PROGRAMMING MELSEC-A 5. PROGRAMMING Initial setting programs for using the A68ADN and digital output value read programs are explained below using sample programs. Initial setting program and digital output value read program [Sample Program Conditions] (1) System configuration Power supply module device...
5. PROGRAMMING MELSEC-A Sample programs when the A68ADN is loaded onto remote I/O station [Precautions when writing programs] (1) Data transmission/receive method Data transmission/receive is made in the batch refresh mode after executing an END (FEND) instruction, even though the PC CPU I/O control mode is direct or refresh.
5. PROGRAMMING MELSEC-A (6) Control signals for the A68ADN If the output signal (Y[ ][ ]) to a remote I/O station is PLS Y[ ][ ]), there are cases when it is not output to the A68ADN in accordance with the relationship between the master station scan time and the link scan time.
5. PROGRAMMING MELSEC-A Programming X001 Procedure …. Error detection for remote I/O statio WAND K0001 D2228 D100 No. 1 (Error if b0 of D9228 is "1") …. Detection parameter communications WAND K0001 D2224 D101 with remote I/O station No. 1 (Initial communications if b0 of D9224 is "1") ….
5. PROGRAMMING MELSEC-A X202 RFRP H0300 K18 W138 X21E …. Reading the error code if a writ data error occurs X21D Y30E Processing after the oc currence of a write data error X002 M14 Y212 …. Resets the write data error stat when (X2) is turned ON The digital M9036...
5. PROGRAMMING MELSEC-A Sample program when an A68ADN is loaded to a remote I/O station (using AnACPU dedicated instructions) Sample program of initial setting and digital output value reading, using AnA dedicated instructions, is explained below for the MELSECNET in which A2A(S1) or A3ACPU functions as the master station and the A68ADN is loaded to a remote I/O station.
5. PROGRAMMING MELSEC-A Programming Procedure X000 MOVP K0017 W301 MOVP K0604 W302 …. Setting initial data to M → R MOVP W305 link registers Initial data setting MOVP K1000 W304 MOVP W30B LEDB RTOP H0200 Writing resolution LEDC W30B …. Writing resolution setting data to an A68ADN LEDC LEDR...
5. PROGRAMMING MELSEC-A M9036 …. Sending an A-D conversion- W32A K2M20 Sending a digital completion flag to M20 to M27 output value to D W320 using thos channels where an W321 …. Sending a digital value to data A-D conversion- register D using those channels W322 completion flag is...
6. TROUBLESHOOTING MELSEC-A 6. TROUBLESHOOTING Error Code Table If an error occurs during PC CPU read/write data operations, the following error codes are stored in the A68ADN buffer memory (address 18). Table 6.1 Error Code Table (Error Detected by the A68ADN) Error Code Causes Corrective Action...
6. TROUBLESHOOTING MELSEC-A Troubleshooting This section deals with troubleshooting related to the A68ADN. For troubleshooting related to the PC CPU, see the appropriate PC CPU User's Manual. 6.2.1 RUN LED (A68ADN) is flashing Check Point Corrective Action Data which disables write or read is written to the Check the error code table (see Section 6.1) for A68ADN.
APPENDICES MELSEC-A APPENDICES APPENDIX 1 Comparison of A68ADN and A68AD/A68AD-S2/A616AD Functions Table A1 Function Comparison Specifications Item A68AD A68AD-S2 A616AD A68ADN –10 to 0 to 10 VDC –10 to 0 to 10 VDC Voltage Analog (input resistance 30 KΩ) (input resistance 1 MΩ) input Current –20 to 20 mADC (input resistance 250 W)