Mitsubishi Electric Melsec Q Series Programming Manual page 168

3 MOTION DEDICATED PLC INSTRUCTION
[Operation]
Sequence program
DP.DDWR instruction
CPU dedicated transmission
(0.88ms cycle)
Target CPU
DP.DDWR accept
Complete device (D2+0)
Status display device (D2+1)
at the completion
(5) There is a limitation for number of simultaneous instruction execution/
simultaneous acceptance in the Motion dedicated PLC instruction.
(Refer to Section 3.3 (2).)
Exchange a large amount of data through the CPU shared memory.
OUT
(S2)
Device memory
D0
D9
Outline operation between CPUs at the DP.DDWR instruction execution is shown
below.
DP.DDWR
ON execution
Request data set
Transfer
0.88ms
(n1)
3E1H
Write
(S1+1)
10 words
(n1)
DP.DDWR H3E1
END
Transfer
Response
data set
DP.DDWR accept
3 - 57
(D1)
Device memory
W10
(S1+1)
10 words
W19
(S1+1)
MOVP K10 D101
(S1) (S2) (D1) (D2)
D100 D0 W10 M100
END END
ON
ON : Abnormal completion only
1 scan