Mitsubishi Electric Melsec Q Series Programming Manual page 185

3 MOTION DEDICATED PLC INSTRUCTION
Device No. Name
Maximum number of blocks used
for the Multiple CPU high-speed
SD796
transmission dedicated instruction
setting (For CPU No.1)
Maximum number of blocks used
for the Multiple CPU high-speed
SD797
transmission dedicated instruction
setting (For CPU No.2)
Maximum number of blocks used
for the Multiple CPU high-speed
SD798
transmission dedicated instruction
setting (For CPU No.3)
Maximum number of blocks used
for the Multiple CPU high-speed
SD799
transmission dedicated instruction
setting (For CPU No.4)
Sequence program
Motion dedicated
PLC instruction
Dedicated instruction
transmission area usage
Block information using
Multiple CPU high-speed
transmission dedicated
instruction (For CPU No.2)
(SM797)
CPU dedicated transmission
(0.88ms cycle)
• Special register of PLC CPU
Meaning
Maximum number of
blocks range for
dedicated instructions
Range: 1 to 7 (Default: 2)
(Note): When setting
other than 1 to 7,
the register
operates as 7.
[Operation timing]
Operation which executes each Motion dedicated instruction and turns on
the Multiple CPU high-speed transmission block information.
Instruction execution
Number of
empty blocks
Transfer
0.88ms
Explanation
Specifies the maximum number of blocks
used for the Multiple CPU high-speed
transmission dedicated instruction.
When the dedicated instruction of Multiple
CPU transmission is executed to the
target CPU, and the number of empty
blocks of the dedicated instruction
transmission area is less than the setting
value of this register, "SM796 to SM799"
is turned ON, which is used as the
interlock signal for consecutive execution
of the dedicated instruction of Multiple
CPU transmission.
Permissible number of executions or
more by the new instruction without an
interlock condition
Maximum number of blocks
used for the Multiple CPU
high-speed transmission
dedicated instruction setting
(For CPU No.2) (SD797)
Permissible number
of executions
ON
Transfer
3 - 74
Set by
User
(At 1 scan after
RUN)
END
Total dedicated
instruction transmission
area
Check at END
processing