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C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3
24.2. Capture/Compare Modules
Each module can be configured to operate independently in one of six operation modes: Edge-triggered
Capture, Software Timer, High Speed Output, Frequency Output, 8-Bit Pulse Width Modulator, or 16-Bit
Pulse Width Modulator. Each module has Special Function Registers (SFRs) associated with it in the CIP-
51 system controller. These registers are used to exchange data with a module and configure the module's
mode of operation.
Table 24.2 summarizes the bit settings in the PCA0CPMn registers used to select the PCA0 capture/com-
pare module's operating modes. Setting the ECCFn bit in a PCA0CPMn register enables the module's
CCFn interrupt. Note: PCA0 interrupts must be globally enabled before individual CCFn interrupts are rec-
ognized. PCA0 interrupts are globally enabled by setting the EA bit (IE.7) and the EPCA0 bit (EIE1.3) to
logic 1. See Figure 24.3 for details on the PCA interrupt configuration.
(for n = 0 to 5)
PCA0CPMn
PCA0CN
P
P
E
C
C
M
T
E
C
C
C
C
W
W
C
A
A
A
O
C
F
R
C
C
M
M
O
P
P
T
G
C
F
F
1
n
M
P
N
n
n
F
5
4
6
n
n
n
n
n
PCA Counter/
Timer Overflow
PCA Module 0
(CCF0)
PCA Module 1
(CCF1)
PCA Module 2
(CCF2)
PCA Module 3
(CCF3)
PCA Module 4
(CCF4)
PCA Module 5
(CCF5)
328
PCA0MD
C
C
C
C
C
C
C
C
E
C
C
C
C
I
P
P
P
C
F
F
F
F
D
S
S
S
F
3
2
1
0
L
2
1
0
0
1
ECCF0
0
1
ECCF1
0
1
ECCF2
0
1
ECCF3
0
1
ECCF4
0
1
ECCF5
0
1
Figure 24.3. PCA Interrupt Block Diagram
Rev. 1.4
EPCA0
EA
(EIE.3)
(IE.7)
Interrupt
0
0
Priority
1
1
Decoder
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