Figure 20.8. Spi Master Timing (Ckpha = 0); Figure 20.9. Spi Master Timing (Ckpha = 1) - Silicon Laboratories C8051F12 Series Manual

8k isp flash mcu
Table of Contents

Advertisement

C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3
SCK*
T
MCKH
MISO
MOSI
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.

Figure 20.8. SPI Master Timing (CKPHA = 0)

SCK*
T
MCKH
MISO
MOSI
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.

Figure 20.9. SPI Master Timing (CKPHA = 1)

T
MCKL
T
MIS
T
MCKL
T
T
MIS
MIH
Rev. 1.4
T
MIH
283

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the C8051F12 Series and is the answer not in the manual?

Table of Contents