Sfr Definition 6.1. Amx0Cf: Amux0 Configuration - Silicon Laboratories C8051F12 Series Manual

C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3

SFR Definition 6.1. AMX0CF: AMUX0 Configuration

0
SFR Page:
0xBA
SFR Address:
R/W R/W
- -
Bit7 Bit6
Bits7–4: UNUSED. Read = 0000b; Write = don't care.
Bit3: AIN67IC: AIN0.6, AIN0.7 Input Pair Configuration Bit.
0: AIN0.6 and AIN0.7 are independent single-ended inputs.
1: AIN0.6, AIN0.7 are (respectively) +, - differential input pair.
Bit2: AIN45IC: AIN0.4, AIN0.5 Input Pair Configuration Bit.
0: AIN0.4 and AIN0.5 are independent single-ended inputs.
1: AIN0.4, AIN0.5 are (respectively) +, - differential input pair.
Bit1: AIN23IC: AIN0.2, AIN0.3 Input Pair Configuration Bit.
0: AIN0.2 and AIN0.3 are independent single-ended inputs.
1: AIN0.2, AIN0.3 are (respectively) +, - differential input pair.
Bit0: AIN01IC: AIN0.0, AIN0.1 Input Pair Configuration Bit.
0: AIN0.0 and AIN0.1 are independent single-ended inputs.
1: AIN0.0, AIN0.1 are (respectively) +, - differential input pair.
Note: The ADC0 Data Word is in 2's complement format for channels configured as differential.
78
R/W R/W R/W
- - AIN67IC
Bit5 Bit4 Bit3
Rev. 1.4
R/W R/W R/W
AIN45IC AIN23IC AIN01IC 00000000
Bit2 Bit1
Reset Value
Bit0