Silicon Laboratories C8051F12 Series Manual page 14

C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3
18. Port Input/Output
Table 18.1. Port I/O DC Electrical Characteristics ................................................. 236
19. System Management Bus / I2C Bus (SMBus0)
Table 19.1. SMB0STA Status Codes and States .................................................. 270
20. Enhanced Serial Peripheral Interface (SPI0)
Table 20.1. SPI Slave Timing Parameters ............................................................ 285
21. UART0
Table 21.1. UART0 Modes .................................................................................... 288
Table 21.2. Oscillator Frequencies for Standard Baud Rates ............................... 295
22. UART1
Table 22.1. Timer Settings for Standard Baud Rates
Using The Internal 24.5 MHz Oscillator ............................................... 305
Table 22.2. Timer Settings for Standard Baud Rates
Using an External 25.0 MHz Oscillator ................................................ 306
Table 22.3. Timer Settings for Standard Baud Rates
Using an External 22.1184 MHz Oscillator .......................................... 306
Table 22.4. Timer Settings for Standard Baud Rates Using the PLL .................... 307
Table 22.5. Timer Settings for Standard Baud Rates Using the PLL .................... 307
23. Timers
24. Programmable Counter Array
Table 24.1. PCA Timebase Input Options ............................................................. 326
Table 24.2. PCA0CPM Register Settings for PCA Capture/Compare Modules .... 329
25. JTAG (IEEE 1149.1)
Table 25.1. Boundary Data Register Bit Definitions .............................................. 342
14 Rev. 1.4