Slave Transmitter Mode; Slave Receiver Mode; Figure 19.6. Typical Slave Transmitter Sequence; Figure 19.7. Typical Slave Receiver Sequence - Silicon Laboratories C8051F12 Series Manual

C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3

19.3.3. Slave Transmitter Mode

Serial data is transmitted on SDA while the serial clock is received on SCL. The SMBus0 interface receives
a START followed by data byte containing the slave address and direction bit. If the received slave address
matches the address held in register SMB0ADR, the SMBus0 interface generates an ACK. SMBus0 will
also ACK if the general call address (0x00) is received and the General Call Address Enable bit
(SMB0ADR.0) is set to logic 1. In this case the data direction bit (R/W) will be logic 1 to indicate a "READ"
operation. The SMBus0 interface receives the clock on SCL and transmits one or more bytes of serial
data, waiting for an ACK from the master after each byte. SMBus0 exits slave mode after receiving a
STOP condition from the master.
S SLA
Received by SMBus
Interface
Transmitted by
SMBus Interface

Figure 19.6. Typical Slave Transmitter Sequence

19.3.4. Slave Receiver Mode

Serial data is received on SDA while the serial clock is received on SCL. The SMBus0 interface receives a
START followed by data byte containing the slave address and direction bit. If the received slave address
matches the address held in register SMB0ADR, the interface generates an ACK. SMBus0 will also ACK if
the general call address (0x00) is received and the General Call Address Enable bit (SMB0ADR.0) is set to
logic 1. In this case the data direction bit (R/W) will be logic 0 to indicate a "WRITE" operation. The
SMBus0 interface receives one or more bytes of serial data; after each byte is received, the interface
transmits an ACK or NACK depending on the state of the AA bit in SMB0CN. SMBus0 exits Slave Receiver
Mode after receiving a STOP condition from the master.
S SLA
Received by SMBus
Interface
Transmitted by
SMBus Interface

Figure 19.7. Typical Slave Receiver Sequence

R A Data Byte A
Interrupt Interrupt
W A Data Byte A
Interrupt Interrupt
Rev. 1.4
Interrupt
Data Byte N P
Interrupt
S = START
P = STOP
N = NACK
R = READ
SLA = Slave Address
Interrupt
Data Byte A P
Interrupt
S = START
P = STOP
A = ACK
W = WRITE
SLA = Slave Address
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