Enhanced Baud Rate Generation; Figure 22.2. Uart1 Baud Rate Logic - Silicon Laboratories C8051F12 Series Manual

C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3

22.1. Enhanced Baud Rate Generation

The UART1 baud rate is generated by Timer 1 in 8-bit auto-reload mode. The TX clock is generated by
TL1; the RX clock is generated by a copy of TL1 (shown as RX Timer in Figure 22.2), which is not user-
accessible. Both TX and RX Timer overflows are divided by two to generate the TX and RX baud rates.
The RX Timer runs when Timer 1 is enabled, and uses the same reload value (TH1). However, an
RX Timer reload is forced when a START condition is detected on the RX pin. This allows a receive to
begin any time a START is detected, independent of the TX Timer state.
Start
Detected
Timer 1 should be configured for Mode 2, 8-bit auto-reload (see
Timer with Auto-Reload" on page 311
occur at two times the desired baud rate. Note that Timer 1 may be clocked by one of five sources:
SYSCLK, SYSCLK / 4, SYSCLK / 12, SYSCLK / 48, or the external oscillator clock / 8. For any given
Timer 1 clock source, the UART1 baud rate is determined by Equation 22.1.
Where T1 is the frequency of the clock supplied to Timer 1, and T1H is the high byte of Timer 1 (reload
CLK
value). Timer 1 clock frequency is selected as described in
page 309 . A quick reference for typical baud rates and system clock frequencies is given in Table 22.1
through Table 22.5. Note that the internal oscillator or PLL may still generate the system clock when the
external oscillator is driving Timer 1 (see
details).
300
Timer 1
Overflow
TL1
TH1
Overflow
RX Timer

Figure 22.2. UART1 Baud Rate Logic

). The Timer 1 reload value should be set so that overflows will
Equation 22.1. UART1 Baud Rate
UARTBaudRate =
Section "23.1. Timer 0 and Timer 1" on page 309
Rev. 1.4
UART1
2
TX Clock
2
RX Clock
Section "23.1.3. Mode 2: 8-bit Counter/
T1
1
CLK
×
------------------------------ - -- -
( )
256 T1H – 2
Section "23.1. Timer 0 and Timer 1" on
for more