Multiply And Accumulate (Mac0); Special Function Registers; Figure 12.1. Mac0 Block Diagram - Silicon Laboratories C8051F12 Series Manual

C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3

12. Multiply And Accumulate (MAC0)

The C8051F120/1/2/3 and C8051F130/1/2/3 devices include a multiply and accumulate engine which can
be used to speed up many mathematical operations. MAC0 contains a 16-by-16 bit multiplier and a 40-bit
adder, which can perform integer or fractional multiply-accumulate and multiply operations on signed input
values in two SYSCLK cycles. A rounding engine provides a rounded 16-bit fractional result after an addi-
tional (third) SYSCLK cycle. MAC0 also contains a 1-bit arithmetic shifter that will left or right-shift the con-
tents of the 40-bit accumulator in a single SYSCLK cycle. Figure 12.1 shows a block diagram of the MAC0
unit and its associated Special Function Registers.
MAC0OVR
1 bit Shift
MAC0CF

12.1. Special Function Registers

There are thirteen Special Function Register (SFR) locations associated with MAC0. Two of these regis-
ters are related to configuration and operation, while the other eleven are used to store multi-byte input
and output data for MAC0. The Configuration register MAC0CF (SFR Definition 12.1) is used to configure
and control MAC0. The Status register MAC0STA (SFR Definition 12.2) contains flags to indicate overflow
conditions, as well as zero and negative results. The 16-bit MAC0A (MAC0AH:MAC0AL) and MAC0B
(MAC0BH:MAC0BL) registers are used as inputs to the multiplier. The MAC0 Accumulator register is 40
bits long, and consists of five SFRs: MAC0OVR, MAC0ACC3, MAC0ACC2, MAC0ACC1, and
MAC0ACC0. The primary results of a MAC0 operation are stored in the Accumulator registers. If they are
needed, the rounded
(MAC0RNDH:MAC0RNDL).
MAC0 A Register
MAC0AH MAC0AL
MAC0FM
16 x 16 Multiply
40 bit Add
MAC0 Accumulator
MAC0ACC3 MAC0ACC2
Rounding Engine
MAC0 Rounding Register
MAC0RNDH

Figure 12.1. MAC0 Block Diagram

results are stored
MAC0 B Register
MAC0BH MAC0BL
MAC0MS
0
1
0
MAC0ACC1 MAC0ACC0
Flag Logic
MAC0RNDL
MAC0STA
in the 16-bit Rounding
Rev. 1.4
Register MAC0RND
165