Jtag Register Definition 25.4. Flashdat: Jtag Flash Data; Jtag Register Definition 25.5. Flashadr: Jtag Flash Address - Silicon Laboratories C8051F12 Series Manual

C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3

JTAG Register Definition 25.4. FLASHDAT: JTAG Flash Data

Bit9
This register is used to read or write data to the Flash memory across the JTAG interface.
Bits9–2: DATA7–0: Flash Data Byte.
Bit1: FAIL: Flash Fail Bit.
0: Previous Flash memory operation was successful.
1: Previous Flash memory operation failed. Usually indicates the associated memory loca-
tion was locked.
Bit0: BUSY: Flash Busy Bit.
0: Flash interface logic is not busy.
1: Flash interface logic is processing a request. Reads or writes while BUSY = 1 will not initi-
ate another operation.

JTAG Register Definition 25.5. FLASHADR: JTAG Flash Address

Bit16
This register holds the address for all JTAG Flash read, write, and erase operations. This register
autoincrements after each read or write, regardless of whether the operation succeeded or failed.
Bits15–0: Flash Operation 17-bit Address.
346 Rev. 1.4
Reset Value
0000000000
Bit0
Reset Value
0x00000
Bit0