Silicon Laboratories C8051F12 Series Manual page 145

C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3
Table 11.2. Special Function Register (SFR) Memory Map (Continued)
0 SADEN0
1 IP
B8
2 (ALL
3 PAGES)
F
0
1 P3 PSBANK
B0
2 (ALL (ALL
3 PAGES) PAGES)
F
0 SADDR0
1 IE
A8
2 (ALL
3 PAGES)
F
0 EMI0TC
P2
1
A0
2 (ALL
3 PAGES)
F CCH0CN
0 SCON0 SBUF0
1 SCON1 SBUF1
98
2
3
F
0 SSTA0
1 P1
90
2 (ALL
3 PAGES) MAC0BL
F
0 TCON TMOD
1 CPT0CN CPT0MD
88
2 CPT1CN CPT1MD
3
F FLSTAT PLL0CN
0
1 P0 SP
80 (ALL (ALL
2
3 PAGES) PAGES)
F
0(8) 1(9)
AMX0CF AMX0SL ADC0CF
AMX2CF AMX2SL ADC2CF
EMI0CN EMI0CF
CCH0TN CCH0LC P0MDOUT
SPI0CFG SPI0DAT
CCH0MA P4MDOUT
MAC0BH MAC0ACC0 MAC0ACC1 MAC0ACC2 MAC0ACC3
TL0 TL1
OSCICN OSCICL OSCXCN
DPL DPH SFRPAGE
(ALL (ALL
PAGES) PAGES) PAGES)
2(A) 3(B)
Rev. 1.4
ADC0L
ADC2
P1MDIN
P1MDOUT P2MDOUT
SPI0CKR
P5MDOUT P6MDOUT
SFRPGCN
TH0 TH1 CKCON
PLL0DIV PLL0MUL
SFRNEXT SFRLAST
(ALL (ALL (ALL
PAGES) PAGES)
4(C) 5(D) 6(E)
ADC0H
FLSCL
FLACL
P3MDOUT
P7MDOUT
MAC0OVR
CLKSEL
PSCTL
PLL0FLT
PCON
(ALL
PAGES)
7(F)
145