Table 22.4. Timer Settings For Standard Baud Rates Using The Pll; Table 22.5. Timer Settings For Standard Baud Rates Using The Pll - Silicon Laboratories C8051F12 Series Manual

C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3

Table 22.4. Timer Settings for Standard Baud Rates Using the PLL

Target Baud Rate
Baud Rate % Error
(bps)
230400 0.45%
115200 -0.01%
57600 0.45%
28800 -0.01%
14400 0.22%
9600 -0.01%
2400 -0.01%
X = Don't care
*Note: SCA1-SCA0 and T1M bit definitions can be found in

Table 22.5. Timer Settings for Standard Baud Rates Using the PLL

Target Baud Rate
Baud Rate % Error
(bps)
230400 -0.01%
115200 0.45%
57600 -0.01%
28800 0.22%
14400 -0.47%
9600 0.45%
X = Don't care
*Note: SCA1-SCA0 and T1M bit definitions can be found in
Frequency: 50.0 MHz
Oscilla- Timer Clock
tor Divide Source
Factor
218 SYSCLK
434 SYSCLK
872 SYSCLK / 4
1736 SYSCLK / 4
3480 SYSCLK / 12
5208 SYSCLK / 12
20832 SYSCLK / 48
Frequency: 100.0 MHz
Oscilla- Timer Clock
tor Divide Source
Factor
434 SYSCLK
872 SYSCLK / 4
1736 SYSCLK / 4
3480 SYSCLK / 12
6912 SYSCLK / 48
10464 SYSCLK / 48
Rev. 1.4
SCA1-SCA0 T1M*
(pre-scale
select)*
XX 1
XX 1
01 0
01 0
00 0
00 0
10 0
Section 23.1
.
SCA1-SCA0 T1M*
(pre-scale
select)*
XX 1
01 0
01 0
00 0
10 0
10 0
Section 23.1
.
Timer 1
Reload
Value (hex)
0x93
0x27
0x93
0x27
0x6F
0x27
0x27
Timer 1
Reload
Value (hex)
0x27
0x93
0x27
0x6F
0xB8
0x93
307