C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3
5.3.
ADC0 Programmable Window Detector
The ADC0 Programmable Window Detector continuously compares the ADC0 output to user-programmed
limits, and notifies the system when an out-of-bound condition is detected. This is especially effective in an
interrupt-driven system, saving code space and CPU bandwidth while delivering faster system response
times. The window detector interrupt flag (AD0WINT in ADC0CN) can also be used in polled mode. The
high and low bytes of the reference words are loaded into the ADC0 Greater-Than and ADC0 Less-Than
registers (ADC0GTH, ADC0GTL, ADC0LTH, and ADC0LTL). Reference comparisons are shown starting
on page 68. Notice that the window detector flag can be asserted when the measured data is inside or out-
side the user-programmed limits, depending on the programming of the ADC0GTx and ADC0LTx regis-
ters.
SFR Definition 5.7. ADC0GTH: ADC0 Greater-Than Data High Byte
0
SFR Page:
0xC5
SFR Address:
R/W
R/W
Bit7
Bit6
Bits7–0: High byte of ADC0 Greater-Than Data Word.
SFR Definition 5.8. ADC0GTL: ADC0 Greater-Than Data Low Byte
0
SFR Page:
0xC4
SFR Address:
R/W
R/W
Bit7
Bit6
Bits7–0: Low byte of ADC0 Greater-Than Data Word.
66
R/W
R/W
R/W
Bit5
Bit4
Bit3
R/W
R/W
R/W
Bit5
Bit4
Bit3
Rev. 1.4
R/W
R/W
R/W
Bit2
Bit1
Bit0
R/W
R/W
R/W
Bit2
Bit1
Bit0
Reset Value
11111111
Reset Value
11111111
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