Figure 17.6. Non-Multiplexed 8-Bit Movx With Bank Select Timing - Silicon Laboratories C8051F12 Series Manual

C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3
17.6.1.3.8-bit MOVX with Bank Select: EMI0CF[4:2] = '110'.
ADDR[15:8] P1/P5
ADDR[7:0] P2/P6
DATA[7:0] P3/P7
/WR P0.7/P4.7
/RD P0.6/P4.6
ADDR[15:8] P1/P5
ADDR[7:0] P2/P6
DATA[7:0] P3/P7
/RD P0.6/P4.6
/WR P0.7/P4.7

Figure 17.6. Non-multiplexed 8-bit MOVX with Bank Select Timing

Nonmuxed 8-bit WRITE with Bank Select
EMIF ADDRESS (8 MSBs) from EMI0CN
EMIF ADDRESS (8 LSBs) from R0 or R1
EMIF WRITE DATA
T
WDS
T T
ACS ACW
Nonmuxed 8-bit READ with Bank Select
EMIF ADDRESS (8 MSBs) from EMI0CN
EMIF ADDRESS (8 LSBs) from R0 or R1
EMIF READ DATA
T
RDS
T T
ACS ACW
Rev. 1.4
P1/P5
P2/P6
P3/P7
T
WDH
T
ACH
P0.7/P4.7
P0.6/P4.6
P1/P5
P2/P6
P3/P7
T
RDH
T
ACH
P0.6/P4.6
P0.7/P4.7
229