Reference Configuration On The C8051F121/3/5/7; Figure 9.2. Voltage Reference Functional Block Diagram (C8051F121/3/5/7) - Silicon Laboratories C8051F12 Series Manual

C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3
9.2.

Reference Configuration on the C8051F121/3/5/7

On the C8051F121/3/5/7 devices, the REF0CN register also allows selection of the voltage reference
source for ADC0 and ADC2, as shown in SFR Definition 9.2. Bits AD0VRS and AD2VRS in the REF0CN
register select the ADC0 and ADC2 voltage reference sources, respectively. The VREFA pin provides a
voltage reference input for ADC0 and ADC2, which can be connected to an external precision reference or
the internal voltage reference. ADC0 may also reference the DAC0 output internally, and ADC2 may refer-
ence the analog power supply voltage, via the VREF multiplexers shown in Figure 9.2.
External
Voltage
Reference
Circuit
DGND

Figure 9.2. Voltage Reference Functional Block Diagram (C8051F121/3/5/7)

VDD
R1
VREFA
VREF
+
4.7μF 0.1μF
Recommended Bypass
Capacitors
REF0CN
ADC2
AV+
Ref
1
0
ADC0
Ref
0
1
DAC0
Ref
DAC1
BIASE
EN
x2
1.2V
Band-Gap
REFBE
Rev. 1.4
Bias to
ADCs,
DACs
115