Sfr Definition 18.13. P4: Port4 Data; Sfr Definition 18.14. P4Mdout: Port4 Output Mode - Silicon Laboratories C8051F12 Series Manual

C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3
R/W R/W
P4.7 P4.6
Bit7 Bit6
Bits7–0: P4.[7:0]: Port4 Output Latch Bits.
Write - Output appears on I/O pins.
0: Logic Low Output.
1: Logic High Output (Open-Drain if corresponding P4MDOUT.n bit = 0). See SFR Definition
18.14.
Read - Returns states of I/O pins.
0: P4.n pin is logic low.
1: P4.n pin is logic high.
Note: P4.7 (/WR), P4.6 (/RD), and P4.5 (ALE) can be driven by the External Data Memory Interface.
See Section "17. External Data Memory Interface and On-Chip XRAM" on page 219
more information.

SFR Definition 18.14. P4MDOUT: Port4 Output Mode

R/W R/W
Bit7 Bit6
Bits7–0: P4MDOUT.[7:0]: Port4 Output Mode Bits.
0: Port Pin output mode is configured as Open-Drain.
1: Port Pin output mode is configured as Push-Pull.
254

SFR Definition 18.13. P4: Port4 Data

R/W R/W R/W
P4.5 P4.4 P4.3
Bit5 Bit4 Bit3
R/W R/W R/W
Bit5 Bit4 Bit3
Rev. 1.4
R/W R/W R/W
P4.2 P4.1 P4.0
Bit2 Bit1 Bit0
SFR Address:
SFR Page:
R/W R/W R/W
Bit2 Bit1 Bit0
SFR Address:
SFR Page:
Reset Value
11111111
Bit
Addressable
0xC8
F
for
Reset Value
00000000
0x9C
F