7.2.4
Port n Pull-up Resistor Control Registers
PnPLU is the register to control the pull-up resistor addition to I/O.
Port 0 Pull-up Resistor Control Register (P0PLUP: 0x03F40)
bp
7
Bit name
At reset
0
Access
R/W
bp
Bit name
7-0
P0PLU7-0
Port 1 Pull-up Resistor Control Register (P1PLUP: 0x03F41)
bp
7
Bit name
At reset
0
Access
R/W
bp
Bit name
7-0
P1PLU7-0
Port 2 Pull-up Resistor Control Register (P2PLUP: 0x03F42)
bp
7
Bit name
-
At reset
0
Access
R
bp
Bit name
7
-
6-0
P2PLU6-0
6
5
0
0
R/W
R/W
R/W
Pull-up resistor selection
0: Not added
1: Added
6
5
0
0
R/W
R/W
R/W
Pull-up resistor selection
0: Not added
1: Added
6
5
0
0
R/W
R/W
R/W
Always read as 0.
Pull-up resistor selection
0: Not added
1: Added
4
3
2
P0PLU7-0
0
0
0
R/W
R/W
Description
4
3
2
P1PLU7-0
0
0
0
R/W
R/W
Description
4
3
2
P2PLU6-0
0
0
0
R/W
R/W
Description
Chapter 7
I/O Port
1
0
0
0
R/W
R/W
1
0
0
0
R/W
R/W
1
0
0
0
R/W
R/W
Control Registers
VII - 15