Panasonic MN101L Series User Manual page 93

Oscillation Stabilization Wait Time Control Register (DLYCTR: 0x03F03)
bp 7
Bit name -
At reset 0
Access R
bp Bit name
7-4 - Always read as 0.
Oscillation stabilization wait cycle selection
0000: 2
0001: 2
0010: 2
0011: 2
0100: 2
0101: 2
0110: 2
3-0 DLY3-0
0111: 2
1000: 2
1001: 2
1010: 2
1011: 2
1100: 2
1101: Prohibited
1110: Prohibited
1111: Prohibited
The stabilization wait cycle of external oscillation should be determined in consultation with
the oscillator manufacturer.
.. ..
Set the stabilization wait cycle of internal oscillation to match the following conditions.
- Internal high-speed oscillation: 15 µs or more
- Internal low-speed oscillation: 100 µs or more
..
..
6 5 4
- -
0 0 0
R R R
× (1/f
14
)
OSCSTBCLK
13 × (1/f
)
OSCSTBCLK
12 × (1/f
)
OSCSTBCLK
× (1/f
11
)
OSCSTBCLK
10 × (1/f
)
OSCSTBCLK
9 × (1/f
)
OSCSTBCLK
× (1/f
8
)
OSCSTBCLK
7 × (1/f
)
OSCSTBCLK
6 × (1/f
)
OSCSTBCLK
× (1/f
5
)
OSCSTBCLK
× (1/f
4
)
OSCSTBCLK
3 × (1/f
)
OSCSTBCLK
× (1/f
2
)
OSCSTBCLK
3 2
-
0 0
R/W R/W
Description
1 0
DLY3-0
0 0
R/W R/W
Reset
Chapter 2
CPU
II - 31