Panasonic MN101L Series User Manual page 235

Register LCCTR3
Bit name SEGSL25
1
0
*1 When serial data is output, set the P4DIR.P4DIR2 to "1".
*2 When serial data is input and output, set the bit to "1".
Register
Bit name
*1 When the LSI is the master of Clock-synchronous communication or communicates on IIC bus,
set the P4DIR.P4DIR3 to "1".
Register
Bit name
*1 When the LSI outputs the chip select signal, set the P4DIR.P4DIR4 to "1".
Register
Bit name
Table:7.8.4 P42 Function Selection
Setup
SC2MD1
SC2SBOS SC2SBIS
- -
1 (*1) - (*2)
1
0
0
Table:7.8.5 P43 Function Selection
Setup
LCCTR3 SC2MD1
SEGSL24 SC2SBTS
1
1 (*1)
0
0
Table:7.8.6 P44 Function Selection
Setup
LCCTR3 SC2MD2
SEGSL23 SC2SBCSEN
1
1 (*1)
0
Table:7.8.7 P45 Function Selection
Setup
LCCTR3 SC1MD1
SEGSL22 SC1SBIS
1 -
1
0
0
SC2IOM
-
- (*2)
1
0
Function
SC23SEL
SC2SEL2
- -
0 SBT2A/SCL2A
-
SC23SEL
SC2SEL3
- -
0
0 -
SC01SEL
SC1IOM SC1SEL0
- -
0 1
0 -
Function
SC23SEL
SC2SEL1
- SEG25
0
SBO2A/
SDA2A
0
- P42
SEG24
P43
Function
SEG23
SBCS2A
P44
Function
SEG22
SBI1B/RXD1B
P45
Port 4
Chapter 7
I/O Port
VII - 47