Panasonic MN101L Series User Manual page 264

Chapter 8
8-bit Timer
Count Timing of Timer Operation (Timer 0 to Timer 5)
The binary counter counts up with the selected count clock, as shown below. This is the basic operation for all
functions of 8-bit timer.
Count
Clock
TMnEN
bit
Internal
enable
Compare
register
Binary
counter
Interrupt
request
• (A) If any data are written to the compare register while the count operation is disabled (the TMnMD.TMnEN
is set to "0"), the binary counter is cleared to "0x00".
• (B) When activating the counter by setting the TMnMD.TMnEN to "1", the internal enable is set at the next
count clock. Then, the binary counter starts counting up from the next count clock where the internal enable
has been set.
• (C) When the value of binary counter matches the setting value of compare register, an interrupt request is
generated at the next count clock. Then, the binary counter is cleared and restarts counting up.
• (D) Even if the compare register is rewritten while the count operation is enabled (the TMnMD.TMnEN is set
to "1"), the binary counter is not changed.
• (E) When the count operation is disabled (the TMnMD.TMnEN is set to "0"), the internal enable is reset at the
next count clock. The binary counter stops counting.
VIII - 16 8-bit Timer
M
00
(A)
Figure:8.3.1 Count Timing of Timer Operation (Timer 0 to Timer 5)
N
01 02 N-1
(B)
(D)
N 00 01 02 03
(C)
(E)
M