Dma Source Address Register - Panasonic MN101L Series User Manual

14.2.2

DMA Source Address Register

DMA Source Address Register lower side (DMSRCL: 0x03E04)
bp 7
Bit name
At reset 0
Access R/W
bp Bit name
7-0 DMSA7-0
DMA Source Address Register middle side (DMSRCM: 0x03E05)
bp 7
Bit name
At reset 0
Access R/W
bp Bit name
7-0 DMSA15-8
DMA Source Address Register upper side (DMSRCH: 0x03E06)
bp 7
Bit name -
At reset 0
Access R
bp Bit name
7-1 -
0 DMSA16
6 5
0 0
R/W R/W
Source address lower side (bit 0 to 7)
This register shows the address where the next data to be loaded is contained.
6 5
0 0
R/W R/W
Source address middle side (bit 8 to 15)
This register shows the address where the next data to be loaded is contained.
6 5
- -
0 0
R R
Always read as "0".
Source address upper side (bit 16)
This register shows the address where the next data to be loaded is contained.
4 3
DMSA7-0
0 0
R/W R/W
Description
4 3
DMSA15-8
0 0
R/W R/W
Description
4 3
- -
0 0
R R
Description
2 1
0 0
R/W R/W
2 1
0 0
R/W R/W
2 1
- - DMSA16
0 0
R R
DMA Controller Control Registers
Chapter 14
DMA Controller
0
0
R/W
0
0
R/W
0
0
R/W
XIV - 9