Panasonic MN101L Series User Manual page 293

Lsi
Table of Contents

Advertisement

Timer 7 Mode Register 2 (TM7MD2: 0x03FA9)
bp
7
Bit name
T7ICEDG0 T7PWMSL
At reset
0
Access
R/W
bp
Bit name
7
T7ICEDG0
6
T7PWMSL
5
TM7BCR
4
TM7PWM
3
TM7IRS1
2
T7ICEN
1-0
T7ICT1-0
6
5
TM7BCR
TM7PWM
0
0
R/W
R/W
Select capture trigger edge
0: Both edges
1: Specified edge
Select PWM mode
0: Set duty through TM7OC1
1: Set duty through TM7OC2
Select timer clear source
0: Overflow by full count
1: Match between TM7BC and TM7OC1
Select timer output waveform
0: Timer output
1: PWM output
Select timer interrupt source
0: Counter clear
1: Match of TM7BC and TM7OC1
Input capture operation enable
0: Disabled
1: Enabled
Select capture trigger
00: External Interrupt 0 input signal
01: External Interrupt 1 input signal
10: External Interrupt 2 input signal
11: Timer Interrupt
4
3
TM7IRS1
T7ICEN
0
0
R/W
R/W
Description
2
1
T7ICT1-0
0
0
R/W
R/W
16-bit Timer Control Registers
Chapter 9
16-bit Timer
0
0
R/W
IX - 11

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Mn101lr05dMn101lr04dMn101lr03dMn101lr02d

Table of Contents