Panasonic MN101L Series User Manual page 451

Master Reception Timing
(1)
SDAn
SCLn
SCnTIRQ
IIC3BUSBSY
Set data to TXBUFn
(1) Generate start condition by setting data to TXBUFn
(2) Transmit Address data (slave address + R/W bit)
(3) Receive ACK bit
(4) Set SCnMD3.IIC3REX to "1" and write dummy data to TXBUFn in interrupt handler
(5) Receive data
(6) Transmit NACK bit
(7) Set SCnMD3.IIC3STPC in interrupt handler
(8) Generate stop condition
(2) (3)
address data
transmission
. .
1 2 8 ACK
Set dummy data to TXBUFn
Figure:13.5.8 Master Reception Timing
(4) (5)
8 bits reception
. .
1 2
Serial Interface
(6) (7) (8)
8
NACK
Set IIC3STPC
IIC Communication
Chapter 13
XIII - 63