Panasonic MN101L Series User Manual page 150

Lsi
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Chapter 4
Clock/ Mode/ Voltage Control
Low-speed Oscillation Clock Control Register (SCLKCNT: 0x03F06)
bp
Bit name
SCLKSEL
Initial value
Access
bp
Bit name
7
SCLKSEL
6-3
2
Reserved
1
SOSCCNT
0
SRCCNT
The SCLKSEL must be set while both the SOSCCNT and the SRCCNT are "1".
At this time, HOSCCLK and HRCCLK must be stable.
..
When changing the SCLKSEL in Normal mode, the following wait time must be ensured
before disable the clock oscillation to be stopped.
Wait time: (two cycles of the external low-speed oscillation) +
When changing the SCLKSEL in Slow mode, the above wait time is not needed.
..
IV - 8
Clock Control
7
6
-
0
0
R/W
R
Low-speed oscillation clock select
0: Internal low-speed oscillation
1: External low-speed oscillation
-
Always read as "0000".
Always set to "1".
External low-speed oscillation circuit control
0: disabled
1: enabled
Internal low-speed oscillation circuit control
0: disabled
1: enabled
(two cycles of the internal low-speed oscillation)
5
4
3
-
-
-
0
0
0
R
R
R
Description
2
1
Reserved
SOSCCNT
1
1
R/W
R/W
0
SRCCNT
1
R/W

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