Panasonic MN101L Series User Manual page 290

Lsi
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Chapter 9
16-bit Timer
Binary counters are 16-bit up counters. If data is written to the preset register 1 (TMnPR1L to TMnPR1H) while
the counting is stopped, the binary counter is cleared to "0x0000".
For Timer 7, the binary counters are cleared to "0x0000" while IGBT operation is disabled at IGBT setting. The
binary counters for Timer 7 and 8 can be cleared to "0x0000" at a capture operation while counting by setting the
register.
Timer n Binary Counter (Lower 8 bits)
(TM7BCL: 0x03FA0, TM8BCL: 0x03FB0, TM9BCL: 0x03FC0)
bp
Bit name
At reset
Access
Timer n Binary Counter (Upper 8 bits)
(TM7BCH: 0x03FA1, TM8BCH: 0x03FB1, TM9BCH: 0x03FC1)
bp
Bit name
At reset
Access
Input capture registers are registers that hold the value loaded from the binary counters at a capture trigger.
Timer n Input Capture Register (Lower 8 bits)
(TM7ICL: 0x03FA6, TM8ICL: 0x03FB6, TM9ICL: 0x03FC6)
bp
Bit name
At reset
Access
Timer n Input Capture Register (Upper 8 bits)
(TM7ICH: 0x03FA7, TM8ICH: 0x03FB7, TM9ICH: 0x03FC7)
bp
Bit name
At reset
Access
IX - 8
16-bit Timer Control Registers
7
6
X
X
R
R
7
6
X
X
R
R
7
6
X
X
R
R
7
6
X
X
R
R
5
4
TMnBCL7-0
X
X
R
R
5
4
TMnBCH7-0
X
X
R
R
5
4
TMnICL7-0
X
X
R
R
5
4
TMnICH7-0
X
X
R
R
3
2
X
X
R
R
3
2
X
X
R
R
3
2
X
X
R
R
3
2
X
X
R
R
1
0
X
X
R
R
1
0
X
X
R
R
1
0
X
X
R
R
1
0
X
X
R
R

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