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Chapter 15
Buzzer
15.1 Overview
Buzzer circuit outputs the square wave generated by dividing HCLK by 1/2
HCLK
SCLK
BUZCTR.BUZS2-0
BUZCTR.BUZOE
Reset
XV - 2
Overview
Clock Divider
R
Count Clear
Controller
Figure:15.1.1 Buzzer Block Diagram
9
14
f
/2
HCLK
13
f
/2
HCLK
12
f
/2
HCLK
11
f
/2
HCLK
Output
10
MUX
f
/2
HCLK
Control
9
f
/2
HCLK
4
f
/2
SCLK
BUZCTR.BUZOE
3
f
/2
SCLK
BUZCTR.BUZS2-0
14
3
to 1/2
or SCLK by 1/2
Buzzer Output(BUZA/BUZB)
Inverted Buzzer Output(NBUZA/NBUZB)
4
to 1/2
.
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