Panasonic MN101L Series User Manual page 300

Chapter 9
16-bit Timer
Timer 9 Mode Register 1 (TM9MD1: 0x03FC8)
bp
Bit name
At reset
Access
bp
7
6
5
4
3-2
1-0
IX - 18 16-bit Timer Control Registers
7 6
- T9ICEDG1 TM9CL
0 0
R R/W R/W
Bit name
- Always read as "0".
Select capture trigger edge
T9ICEDG1 0: Falling edge
1: Rising edge
Timer output enable
TM9CL 0: Enabled
1: Disabled (reset)
Control timer count
TM9EN 0: Disabled
1: Enabled
Select count clock
00: 1/1 clock
TM9PS1-0 01: 1/2 clock
10: 1/4 clock
11: 1/16 clock
Select clock source
00: HCLK
TM9CK1-0 01: SYSCLK
10: TM9IO input
11: SCLK
5 4
TM9EN
1 0
R/W R/W
Description
3 2
TM9PS1-0
0 0
R/W R/W
1 0
TM9CK1-0
0 0
R/W