Timer Mode Registers - Panasonic MN101L Series User Manual

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Chapter 9
16-bit Timer
9.2.2

Timer Mode Registers

Timer 7 Mode Register 1 (TM7MD1: 0x03FA8)
bp
Bit name
At reset
Access
bp
7
6
5
4
3-2
1-0
IX - 10
16-bit Timer Control Registers
7
6
-
T7ICEDG1
TM7CL
0
0
R
R/W
R/W
Bit name
-
Always read as 0.
Select capture trigger edge
T7ICEDG1
0: Falling edge
1: Rising edge
Timer output enable
TM7CL
0: Enabled
1: Disabled (reset)
Control timer count
TM7EN
0: Disabled
1: Enabled
Select count clock
00: 1/1 clock
TM7PS1-0
01: 1/2 clock
10: 1/4 clock
11: 1/16 clock
Select clock source
00: HCLK
TM7CK1-0
01: SYSCLK
10: TM7IO input
11: SCLK
5
4
TM7EN
1
0
R/W
R/W
Description
3
2
TM7PS1-0
0
0
R/W
R/W
1
0
TM7CK1-0
0
0
R/W

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