Panasonic MN101L Series User Manual page 289

Preset registers are buffer registers for compare registers.
When writing data to the preset register while the counting is stopped, the same data is loaded to the compare reg-
ister. When writing data to the preset register while counting, the data of preset register is loaded to the compare
register at the timing when the binary counter is cleared.
Timer n Preset Register 1 (Lower 8 bits)
(TM7PR1L: 0x03FA4, TM8PR1L: 0x03FB4, TM9PR1L: 0x03FC4)
bp 7
Bit name
At reset X
Access R/W
Timer n Preset Register 1 (Upper 8 bits)
(TM7PR1H: 0x03FA5, TM8PR1H: 0x03FB5, TM9PR1H: 0x03FC5)
bp 7
Bit name
At reset X
Access R/W
Timer n Preset Register 2 (Lower 8 bits)
(TM7PR2L: 0x03FAC, TM8PR2L: 0x03FBC, TM9PR2L: 0x03FCC)
bp 7
Bit name
At reset X
Access R/W
Timer n Preset Register 2 (Upper 8 bits)
(TM7PR2H: 0x03FAD, TM8PR2H: 0x03FBD, TM9PR2H: 0x03FCD)
bp 7
Bit name
At reset X
Access R/W
Timer 7 preset register 1 and 2 must not be changed during IGBT operation.
.. ..
6 5
X X
R/W R/W
6 5
X X
R/W R/W
6 5
X X
R/W R/W
6 5
X X
R/W R/W
4 3
TMnPR1L7-0
X X
R/W R/W
4 3
TMnPR1H7-0
X X
R/W R/W
4 3
TMnPR2L7-0
X X
R/W R/W
4 3
TMnPR2H7-0
X X
R/W R/W
2 1
X X
R/W R/W
2 1
X X
R/W R/W
2 1
X X
R/W R/W
2 1
X X
R/W R/W
16-bit Timer Control Registers
Chapter 9
16-bit Timer
0
X
R/W
0
X
R/W
0
X
R/W
0
X
R/W
IX - 7