Processor Status Word (Psw - Panasonic MN101L Series User Manual

2.1.6

Processor Status Word (PSW)

PSW is pushed onto the stack at interrupt occurrence and popped at returning from the interrupt service routine
automatically.
Processor Status Word (PSW)
bp 7
Bit name BKD
At reset 0
Access R/W
bp Bit name
7 BKD
6 MIE
5-4 IM1-0
3 VF
2 NF
1 CF
0 ZF
Zero Detection (ZF)
ZF is set to "1", when all bits are "0" in the operation result. Otherwise, zero bit is set to "0".
Carry Detection (CF)
CF is set to "1", when a carry from or a borrow to the MSB occurs. Carry bit is set to "0", when no carry or borrow
occurs.
Negative Detection (NF)
NF is set to "1" when MSB is "1" and set to "0" when MSB is "0". Negative bit is used to handle a signed value.
Overflow Detection (VF)
VF is set to "1", when the operation results overflow as a signed value. Otherwise, overflow bit is set to "0". Over-
flow bit is used to handle a signed value.
6 5
MIE IM1-0
0 0
R/W R/W
Description
Bank function control
0: Bank addressing is enabled.
1: Bank addressing is disabled.
Maskable interrupt enable control
0: Disable
1: Enable
Interrupt mask level
Controls accept level of maskable interrupt.
Overflow detection
0: Not detected
1: Detected
Negative detection
0: Not detected
1: Detected
Carry detection
0: Not detected
1: Detected
Zero detection
0: Not detected
1: Detected
4 3
VF
0 0
R/W R/W
2 1
NF CF
0 0
R/W R/W
Overview
Chapter 2
CPU
0
ZF
0
R/W
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