Panasonic MN101L Series User Manual page 104

Chapter 3
Interrupts
Interrupt Return Operation (RTI instruction)
RTI instruction makes the LSI go back to the program which had been executed before the interrupt occurred.
Before RTI execution, if the data of D0/D1/D2/D3 and A0/A1 registers was saved in the interrupt handler with
PUSH instruction, they are needed to be backed to each registers with POP instruction.
The following is the processing sequence invoked by RTI instruction.
1. PSW are restored from the stack. (SP)
2. PC -i.e., the return address- are restored from the stack. (SP + 1 to SP + 3)
3. HA are restored from the stack. (SP + 4, SP+ 5)
4. SP is updated. SP +6
5. Jump to the program address of PC.
Registers such as data registers (D0/D1/D2/D3), or address registers (A0/A1) are not saved
by hardware, so save them onto the stack with PUSH instruction, if necessary.
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The reserved bits (bp6 to bp4) in the address where the PC [bit19 to bit16, bitH]) are saved to
the stack, are reserved. Do not change them by software.
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III - 10 Overview
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