Panasonic MN101L Series User Manual page 74

Lsi
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Chapter 2
CPU
Bank Register for Source Address (SBNKR: 0x03F0A)
The SBNKR is used to specify bank area for loading instruction. Once this register is specified, bank control is
valid for all addressing modes except I/O short instruction and stack relative indirect instruction.
Refer to [2.1.8 Addressing Modes]
bp
Bit name
At reset
Access
bp
Bit name
7-4
3-1
Reserved
0
SBA0
Bank Register for Destination Address (DBNKR: 0x03F0B)
The DBNKR is used to specify bank area for storing instruction. Once this register is specified, bank control is
valid for all addressing modes except I/O short instruction, stack relative indirect instruction and bit manipulation
instruction.
Refer to [2.1.8 Addressing Modes]
bp
Bit name
At reset
Access
bp
7-4
3-1
0
Bit manipulation instruction depends on the value of the SBNKR register, both of for reading
and writing.
..
..
II - 12
Overview
7
6
-
-
0
0
R
R
-
Always read as 0.
Must be set to 0.
Assignment of bank for source data access address
0: bank 0
1: bank 1
7
6
-
-
0
0
R
R
Bit name
-
Always read as 0.
Reserved
Must be set to 0.
Assignment of bank for destination data access address
DBA0
0: bank 0
1: bank 1
5
4
-
-
Reserved
0
0
R
R
R/W
Description
5
4
-
-
Reserved
0
0
R
R
R/W
Description
3
2
Reserved
Reserved
0
0
R/W
R/W
3
2
Reserved
Reserved
0
0
R/W
R/W
1
0
SBA0
0
0
R/W
1
0
DBA0
0
0
R/W

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