Panasonic MN101L Series User Manual page 68

Chapter 2
CPU
Interrupt Mask Level (IM1 to IM0)
Interrupt mask level (IM1, IM0) controls the accept level of maskable interrupt.
Maskable Interrupt Enable (MIE)
When MIE is set to '1', the maskable interrupt which is not masked with IM1, IM0 is accepted and the value of
MEMCTR.MIESET is load into MIE. When MIE is set to '0', all maskable interrupts are not accepted.
MIE
0
1
Bank Function Control (BKD)
When BKD is set to '1', bank function is not valid and data access area is limited within the address of 0x00000 to
0x0FFFF. At the interrupt occurrence, BKD bit is set to "1" and the bank function is invalid.
When returning from the above interrupt procedure, the set value of BKD is returned to the one which is set
before the interrupt occurrence.
To enable the bank function in an interrupt service routine, set the BKD to "0" before access-
ing to data.
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Before setting the interrupt control register (xxxICR), set PSW.MIE to "0".
If xxxICR is written when PSW.MIE is '1 ', there's no guarantee of proper operation.
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II - 6 Overview
Table:2.1.3 Interrupt Mask Level and Interrupt Acceptance
Interrupt mask level
IM1 IM0
Don't care
0 0
0 1
1 0
1 1
Priority Acceptable interrupt level
Non-maskable interrupt ( NMI )
Highest NMI
Higher NMI, level 0
Lower NMI, level 0 to 1
Lowest NMI, level 0 to 2