Panasonic MN101L Series User Manual page 185

PSVD Control Register 1 (LVICTR1: 0x03F67)
bp 7
Bit name -
At reset 0
Access R
bp Bite name
7-2 -
1 LVIOUT
0 LVION
The LVIOUT is not sticky bit and it could change after the LVIIRQ is generated.
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To set the PERI1EN.PERI1EN0, more than 1.5 ms is required since the LVION is set to "1".
To read the LVICTR1.LVIOU, more than 1.5 ms is required since the LVION is set to "1".
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6 5
- -
0 0
R R
Always read as 0.
V monitor bit
DD30
≤ V
0: V
DD30 LVI
≥ V
1: V
DD30 LVI
PSVD enable control
0: Disabled
1: Enabled
4 3
- -
0 0
R R
Description
Power Supply Voltage Detection
2 1
- LVIOUT LVION
0 0
R R/W R/W
Control Register
Chapter 6
0
0
VI - 5