Bcdsub Bcd Subtraction (Without Carry - Panasonic MN101L Series User Manual

Chapter 2
CPU
2.4.7

BCDSUB BCD subtraction (without carry)

BCDSUB (MOV 0x40, (0x03F07))
Operation
Bit Changes
VF: 0
NF: 0
CF: Set if the result is smaller than "0", otherwise set to "0".
ZF: Set if the result is "0", otherwise set to "0".
Execution of BCD subtraction (without carry)
1. Store the 8-bit value of the two-digit BCD as a subtrahend to the D0 register. Store the 8-bit value of the two-
digit BCD as a minuend to the D1 register.
2. Execute MOV 0x40, (0x03F07) (Extended calculation macro instruction BCDSUB).
3. Subtracts the D0 register (8-bit) and the D1 register (8-bit) as the value of each two-digit BCD, and stores the
result (8-bit) after the BCD correction to the D0 register.
When this extended calculation instruction is executed, the handy address (HA) is updated in
"0x03F07"
.. ..
In this instruction, do not enter the value that can not be represented in BCD. If you enter it,
the result is not guaranteed.
.. ..
II - 26 Extended Calculation Instruction
D0 (BCD) - D1 (BCD) → D0 (BCD)
Subtracts the D0 register (8-bit) and the D1 register (8-bit) as the value of each two-
digit BCD, and stores the result (8-bit) after the BCD correction to the D0 register.
VF NF CF
0 0
Size, Cycles, Codes
6 nibbles
4 cycles
0000 0010 0111 0000 0000 0100
ZF