Chapter 4
Clock/ Mode/ Voltage Control
To make clock switching between HCLK and SCLK stable and synchronized, the frequency
of HCLK must be 2.5 times or more than that of SCLK.
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Although HCLK oscillates in IDLE mode, do not operate the peripheral circuits with HCLK.
Peripheral circuits must be enabled with HCLK after the CPU goes to NORMAL mode.
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IV - 14
Mode Control Function