Panasonic MN101L Series User Manual page 242

Chapter 7
I/O Port
Register
Bit name
*1 When the LSI is the master of Clock-synchronous communication, set the P6DIR.P6DIR6 to "1".
Register
Bit name
*1 When the LSI outputs the chip select signal, set the P6DIR.P6DIR7 to "1".
VII - 54 Port 6
Table:7.10.8 P66 Function Selection
Setup
LCCTR1 KEYIEN
SEGSL5 KEYI6EN
1 -
1
0
0
Table:7.10.9 P67 Function Selection
Setup
LCCTR1 KEYIEN
SEGSL4 KEYI7EN
1 -
1
0
0
KEYSEL SC0MD1
KEY6SEL SC0SBTS
- -
1 0
1 (*1)
-
0
KEYSEL SC0MD3
KEY7SEL SC0SBCSEN
- -
1 0
1 (*1)
-
0
Function
SC01SEL
SC0SEL2
- SEG5
- KEY6B
0 SBT0A
- P64
Function
SC01SEL
SC0SEL3
- SEG4
- KEY7B
0 SBCS0A
- P67