Panasonic MN101L Series User Manual page 403

SCIFn (n = 0, 1) Mode Register 2 (SC0MD2, SC1MD2)
bp 7
Bit name SCnFM1
Initial
0
value
Access R/W
bp Bit name
7-6 SCnFM1-0
5-4 SCnPM1-0
3 SCnNPE
2 SCnIFS
1 SCnBRKF
0 SCnBRKE
6 5
SCnFM0 SCnPM1
0 0
R/W R/W
UART Frame mode specification
00: Data 7 bit + stop 1 bit
01: Data 7 bit + stop 2 bit
10: Data 8 bit + stop 1 bit
11: Data 8 bit + stop 2 bit
UART parity bit selection
At transmission
00: Add "0" parity
01: Add "1" parity
10: Add "odd" parity
11: Add "even" parity
UART Parity addition enable control
0: Enabled
1: Disabled
Interrupt trigger selection
(Selectable only in Clock-Synchronous communication, and always set "0" in UART
communication.)
0: Communication completion interrupt
1: TXBUFn empty interrupt
UART Break reception monitor
0: Data reception
1: Break reception
UART Break transmission control
0: Data transmission
1: Break transmission
4 3
SCnPM0 SCnNPE
0 0
R/W R/W
Description
At reception
00: Check "0" parity
01: Check "1" parity
10: Check "odd" parity
11: Check "even" parity
2 1
SCnIFS SCnBRKF SCnBRKE
0 0
R/W R
Control Registers
Chapter 13
Serial Interface
0
0
R/W
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