Panasonic MN101L Series User Manual page 259

Lsi
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Timer 2 Mode Register (TM2MD: 0x03F84)
bp
7
Bit name
-
At reset
0
Access
R
bp
Bit name
7
-
6
TM2POP
5
TM2MOD
4
TM2PWM
3
TM2EN
2
-
1-0
TM2CK1-0
6
5
TM2POP
TM2MOD
TM2PWM
0
0
R/W
R/W
Always read as 0.
Initial polarity of output signal select
0: Timer output Low→High, PWM High→Low
1: Timer output High→Low, PWM Low→High
Pulse width measurement control
0: Normal timer operation
1: Pulse width measurement (P80/P62)
Timer 2 operation mode control
0: Normal timer operation
1: PWM operation
Timer 2 count enable
0: Disabled
1: Enabled
Always read as 0.
Clock source select
00: HCLK
01: TM2PSC (prescaler output)
10: SCLK
11: TM2IO input
4
3
TM2EN
0
0
R/W
R/W
Description
2
1
-
TM2CK1-0
0
0
R
R/W
R/W
8-bit Timer Control Registers
Chapter 8
8-bit Timer
0
0
VIII - 11

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